Subject: Re: Proposal Ben_P2: Numeric_Unsigned,
From: Rob Anderson (rob@reawebtech.com)
Date: Mon Oct 07 2002 - 22:58:16 PDT
VhdlCohen@aol.com wrote:
> Rob,
> In a message dated 10/7/02 8:29:15 PM Pacific Daylight Time,
> rob@reawebtech.com writes:
>
> I also like the proposal. This is another package so we could put
> in it whatever Peter doesn't want in 1164, to keep 1164 clean.
> I wouldn't jump through hoops to put div, mod, rem, * in there,
> but it is easy enough.
>
>
>
> From Peter Ashenden
> "- overloaded array/scalar operators for std_(u)logic: P1164."
> Looks like Peter did not cover where the overloaded array/scalar
> operators for std_logic_[u]vector. We need an Excel table to show where
> things go.
>
With the proposal everything is in std_logic_1164 or numeric_1164 (or
whatever we call it) Ideally we only have functions that treat
vectors as numbers in the numeric packages, and don't mix the types
any more.
>
> We are only doing unsigned std_[u]logic_vectors, if we do not allow
> different length vectors for comparison, I doubt people will miss it.
> It doesn't seem right to overload that. Let them have a compile time
> error and fix their problem.
>
>
>
> My concern was that treating std_logic_[u]vector as unsigned would make
> people think that the comparison operators would handle the comparisons
> as truly unsigned numbers (i.e., zero extend of smaller vector). This
> error would occur because we would be saying that std_logic_[u]vector is
> treated as unsigned, for all practical purposes. Of course this is not
> the case since the implicit comparison operators would be used.
> However, I also like the proposal because the real beauty of the package
> are the arithmetic operators on std_logic_[u]vector.
> It might be a good idea though to put a warning, or a note, in the
> package stating which comparison operators are used (the implicit), and
> that to get valid results, it is the responsibility of the user to
> insure that operands used in the comparison are of the same size (thru
> resize if necessary).
Won't the implicit operators give an error for different length arrays?
If so, the user would not be able to compile e.g.: if (a8=a9) then...
The only trouble would be an oddball range returned from a function,
certainly not something a synthesizer would handle.
>
> Resize would be nice to have in, I agree. Jim did you forget that one?
>
>
> Add that too.
>
> ----------------------------------------------------------------------------
> Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
> http://www.vhdlcohen.com/ vhdlcohen@aol.com
> Author of following textbooks:
> * Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
> 0-9705394-2-8
> * Component Design by Example ", 2001 isbn 0-9705394-0-1
> * VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
> * VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
> ------------------------------------------------------------------------------
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