Subject: Reduce_pack loops or recursion?
From: David Bishop (dbishop@server.vhdl.org)
Date: Wed Jul 24 2002 - 08:53:02 PDT
When I initially wrote the reduction operations (which originally
came from an XOR I did several months ago) I looked at the implied
structure which the synthesis tool gave me. It turned out that the
recursive algorithm was the most efficient I could come up with
for synthesis.
As I stated in a previous post:
> The reason for the recursive call is because this is the most
> efficient structure for synthesis. A loop would give me:
>
> Result <= (((((( a * b ) * c ) * d) * e ) * f) * g) * h; -- 7 levels of logic
>
> Where the recursive call gives me:
> Result <= ((a * b) * ( c * d )) * ((e * f) * (g * h)); -- 3 levels of logic.
>
> Now, the synthesis tool can do as it wishes with this structre, but no
> dependancies are implied in it, whereas in the loop, you can assume that
> "h" is a late arriving signal. I wished to make no assumptions, and let
> the tool figure it out.
I still think that this is a valid issue.
I do agree that most simulation and synthesis tools will disregard the
body, and generate the functionality with built in macros. However,
initially they won't do that, and we want something that will synthesize
correctly.
Another thing is that this is a neat example of using recursion.
-- David W. Bishop dbishop@vhdl.org All standard disclaimers apply.
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