IEEE 200X Fast Track Change Proposal

ID:	  FT-11

Status:       Proposed
Proposed:     8/03
Analyzed:     Date
Resolved:     Date

Enhancement Summary:     Allow expressions in port maps
Related issues:          
Relevant LRM section:    

Enhancement Detail:
----------------------------
Expressions in input port maps to create an implicit signal with 
an delta cycle delay.

Currently it is not anticipated to allow expressions in subprogram
port maps for signal class objects. 
   This is consistent with allowing entity/component ports to have 
   constant values mapped to them, but not subprograms 
   Expanding signal rules to subprogram would have to be carefully analyzed


U_UUT : UUT
  port map ( A, Y and C, B) ;

Semantics of expressions in port map:
    convert to equivalent concurrent signal assignment with delta cycle delay
    delta cycle -- prefer no delta cycle
    Note:  Type Conversion/Conversion Function = no delta cycle
    If expression = signal or constants, no delta cycle
    Interesting Cases: 
       "not"(A) no delta cycle, whereas, not A has a delta cycle

Issues relating to conversion functions:
What defines a conversion function:
  only one actual can be a signal
  Allow additional inputs if they are globally constant expressions.

if the entity/component ports are unconstrained, there
can be problematic issues with conversion functions that 
return unconstrained arrays 
   Requirement, the size of the port or conversion function 
   must be globally static.
   example:  to_unsigned(int, 5) returns unconstrained array.
   if port f is unconstrained:
     -- f     => to_unsigned(int, 32),  -- is illegal
     f(31:0)  => to_unsigned(int, 32),  -- legal

Conversion function restriction:  signal name in conversion function 
   must be a    single signal name (slice, name, indexed, sig attribute)
      F => CF(A(3), B(3)) -- not a conversion function, has delta cycle delay
      F => CF(A(3), A(4)) -- not a conversion funciton, has delta cycle delay

If for any reason a function is determined to be a conversion 
function, then a delta cycle delay will be incurred.


Analysis:
----------------------------
[To be performed by the 200X Fast Track Working Group]


Resolution:
----------------------------
[To be performed by the 200X Fast Track Working Group]