Bugs & Enhancements

Home

Home

If you're experiencing a problem, issue, ambiguity or inconsistent treatment of VHDL by different vendors which may be due to a language issue, please fill out and submit the following issue report form. You may also use the issue report form to submit language enhancement requests.

Issue Report Form

When you submit your bug report, it will be entered into our database for tracking purposes.  After an initial assessment by the Issues Screening and Analysis Committee (ISAC), the resolution of the problem will be assigned to an ISAC member, or forwarded to another appropriate VASG committee for analysis and review.

Please be as specific as possible when describing the problem.

Required fields are marked with an * .

  1. What version of the language are you using (or does your tool support)?


  2. Please select the most appropriate classification of the issue.


  3. Please enter a brief one-line description of the problem:
    *
    (example: "Linkage mode is useless")

  4. Please list any known relevant or related sections from the LRM:

    (example: "4.3.1.1 Associations")

  5. Description of issue (provide a detailed description of the issue):
    *


  6. If you would like to suggest a resolution of this issue, please provide your recommendation here:



  7. If you know of any related issue reports, please list them here:



  8. Please list any relevant key words and/or phrases:

    (example: ports, linkage)

  9. Please provide us with the following information in case we need to contact you:
    Name: *
    Phone: *
    Fax:  
    E-mail: *
    Affiliation:  
    Address1:  
    Address2:  
    Address3:  

ALL SUBMISSIONS ARE ACKNOWLEDGED VIA EMAIL!

We may need to contact you for more information, such as if we need to clarify our understanding of the issue.

Back to Top
 

Questions or problems regarding this web site should be directed to .
Copyright © 1998-2003 All rights reserved.