Statement of purpose for Rapid-Prototyping of Application Specific Signal Processors (RASSP)

Rapid-Prototyping of Application Specific Signal Processors RASSP was a major DARPA/Tri-Service initiative to reinvent the process by which embedded digital signal processors were developed. The goal was a four-fold reduction in the time from concept to fielded prototype on both new designs and design upgrades, with similar improvements in life cycle cost, quality and supportability.

Introduction

The goal of the DARPA/Tri-service RASSP program was to dramatically improve the design process for complex digital systems, particularly embedded signal processors. A key objective was to reduce the total product development time by at least a factor of four while making similar improvements in product quality and life cycle cost. Also important was the ability to field state-of-the-art equipment at system build time and to rapidly upgrade the system throughout its life cycle. RASSP met many of these goals through a combination of advanced design methodology emphasizing virtual prototyping, concurrent engineering, and design re-use; modular, scalable signal processor architectures; and a comprehensive supporting base of electronic design infrastructure, including automation tools, hardware and software libraries, enterprise integration capabilities, and standards. The program adopted an incremental refinement "model year" design methodology as a way of stressing the importance of continuous improvement, meeting short development schedules (3 to 12 months), and avoiding point design solutions. The model year methodology requires that systems be upgradable on an annual basis, with increasing function and performance. Many of the results of the RASSP program have been applied to other classes of electronic systems. The RASSP program also pioneered two innovative concepts for managing a process-oriented program. First, development teams were benchmarked with semiannual "quizzes"--small design exercises that provided the feedback needed for continuous process improvement. The first two quizzes were based on design of a synthetic aperture radar image formation processor. Second, the program included an Educator/Facilitator contractor with explicit responsibility to ensure that RASSP design technology transitions effectively to the electronics community at large and continued to mature after completion of the RASSP program. A CD-ROM was created as part of the RASSP program to ensure that the RASSP Methodologies continue to be available after the program ends. The CD-ROM is being sold to the public by the IEEE under the name, VHDL: Electronic Systems Design Methodologies Interactive Tutorial, product number SP1120.