Subject: VHDL 2000 Revision
From: Stephen Bailey (sbailey@synopsys.com)
Date: Fri Jul 14 2000 - 12:31:38 PDT
Here's the status:
1. Only a couple of minor, typographical class comments were received for
D3. Paul has updated the LRM accordingly.
2. Because the changes between D3 and D4 are so slight, I do not think it
is worth distributing D4 for a complete review. Instead, I have attached
below the short list of differences between D3 and D4.
3. I have verified with the IEEE that our PAR is current.
4. I am awaiting confirmation that they do indeed have the balloting group
formed for 2000-Revision. (This should've been done 6-12 months ago, but I
was working to confirm before submitting the ballot package.)
5. I will begin putting together the balloting package immediately. Based
on past experience, it will still take some weeks before anyone in the
balloting group receives it. I'll keep you informed of any status
information I get from the IEEE.
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Changes to P1076-2000
from Draft 3
to Draft 4
* Changed "2000/D3" to "2000/D4" in all page headers.
* Clause 1.1.3, page 9, second sentence of the first paragraph after
the BNF: Changed "All such statements must be passive" to "All entity
statements must be passive".
* Clause 13.1, page 184, last paragraph before the notes: Struck out
"the last" in the phrase "are defined in the last ... 13.10."
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Stephen Bailey
Staff Corporate Applications Engineer, VHDL Simulation
Synopsys Inc.
sbailey@synopsys.com
303-588-2001 (voice/mobile)
650-584-4893 (voice)
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