The Design Automation Standards Committee of the IEEE Computer Society
invites you to become a member of the balloting group for IEEE P1510,
Draft Standard for Chip Hierarchical Design System Technical Data
(CHDStd) Design Automation
SCOPE AND PURPOSE
The Design Automation Standard for Chip Hierarchical Design System
Technical Data (CHDStd) is an EDA representation of an EE product or
portion of an EE product implemented as an integrated circuit (IC)
chip, including the hierarchical information for logical and physical
design. CHDStd will include the interface to cell, macro, and
chip-core library information; physical chip internal design,
manufacturing properties and design aids; and interface to packaging
(physical chip and higher level chip integration packaging such as MCM
and PCA/PCB). CHDStd will be interoperable with current EDA chip
design and implementation standards.
The purpose of CHDStd standard is to provide an interoperable
comprehensive electronic design automation (EDA) standard for
information supporting design, synthesis, verification, and
integration with manufacturing for integrated-circuit based electrical
and electronic (EE) products. Complex ICs require greater design
productivity and a more reliable, integrated, and interoperable EDA
standard than provided by today's EDA standards. This method is aimed
at providing efficient, accurate, and tool independent IC product
information suitable for large complex chip designs such as structured
custom microprocessors.
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--Name:
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Classification type: (U-User, P-Producer, G-General):
IEEE Membership number (optional): (If you are not IEEE member, you can still be part of the balloting group and provide comments on the draft but your vote is not counted)
BALLOTER'S RESPONSIBILITY If you choose to be part of the balloting group, you will have 60 days to review and respond to the draft. In order for the sponsor ballot to be valid, at least 75% of the ballots sent must be returned by the specified date. For that reason, voters have an obligation to respond.
BALLOTING PERIOD At the current time, the working group plans to have a draft prepared for ballot by the end of the first quarter 1998. The balloting period will occur approximately one month after this date and last for a 60-day period. Please supply the correct mailing address for this time. Please do not join the balloting group if you will be unavailable during this period.
Signature:
Date:
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--EMAIL/FAX/POST THIS FORM WITH THE ABOVE INFORMATION FILLED OUT TO:
---Steve Grout - Chair P1510 SEMATECH 2706 Montopolis Dr, Austin, TX 78717-6499 Phone: (512)356-7071 Fax: (512)356-7080 email: grouts@bootskut.eng.sematech.org or Steve.Grout@SEMATECH.Org
--Don Cottrell - Co-Chair P1510 SI2 Phone: (512)342-2244, X22 FAX: (512)342-2037 Email: cottrell@si2.org
COMPLETED INVITATIONS MUST BE RECEIVED BY MARCH 15, 1998. Invitations received will be forwarded to IEEE.
Should you have any questions, please contact me or Don Cottrell at your convenience. Note that this balloting will be conducted in parallel with a similiar CHDStd activity within IEC TC93 WG3.
Sincerely,
Steve Grout, P1510 (CHDStd) Chair Don Cottrell, P1510 Co-Chair
================================================================= Stephen A. Bailey 303-652-1578 (voice) 6664 Cherokee Ct. 303-652-1578 (fax) Niwot, CO 80503 mailto:stephen@srbailey.com http://www.srbailey.com =================================================================