Papers

Using System Verilog Assertions for Creating Property-Based Checkers Eduard Cerny, Angshuman Saha - Synopsys Inc, Dmitry Korchemny - Intel Corp. DVCon, Feb 2007. Introducing The New Accellera Open Verification Library Standard Harry D. Foster, Kenneth Larsen - Mentor Graphics Corp. Mike Turpin - ARM. DVCon, Feb 2006. Bringing Formal Property Verification Methodology To An ASIC Design Erik Seligman, Ram Koganti, Kapilan Maheswaran, Rami Naqib - Intel Corp. DVCon, Feb 2006. Slides available here.

Books

	Assertion-Based Design Harry Foster, Adam Krolnik, David Lacey. Springer, 2nd Edition (May 19, 2004). More info ...
	Principles of Verifiable RTL Design Lionel Bening and Harry Foster. Springer, 2 edition (May 1, 2001). More info ...