|=============================================================================
|=============================================================================
| I/O Buffer Information Specification (IBIS) Version 4.2 (June 2, 2006)
|
| IBIS is a standard for electronic behavioral specifications of integrated
| circuit input/output analog characteristics.
|
| Copyright (c) IBIS Open Forum 2006
|=============================================================================
|=============================================================================
|
|                    T A B L E    O F    C O N T E N T S
|
|=============================================================================
|=============================================================================
|
| Section 1 .... GENERAL INTRODUCTION
| Section 2 .... STATEMENT OF INTENT
| Section 3 .... GENERAL SYNTAX RULES AND GUIDELINES
| Section 3a ... KEYWORD HIERARCHY
| Section 4 .... FILE HEADER INFORMATION
| Section 5 .... COMPONENT DESCRIPTION
| Section 6 .... MODEL STATEMENT
| Section 6a ... ADD SUBMODEL DESCRIPTION
| Section 6b ... MULTI-LINGUAL MODEL EXTENSIONS
| Section 7 .... PACKAGE MODELING
| Section 8 .... ELECTRICAL BOARD DESCRIPTION
| Section 9 .... NOTES ON DATA DERIVATION METHOD
|
|=============================================================================
|=============================================================================
|
|                                 Section 1
|
|                  G E N E R A L    I N T R O D U C T I O N
|
|=============================================================================
|=============================================================================
|
| This section gives a general overview of the remainder of this document.
| 
| Sections 2 and 3 contain general information about the IBIS versions and the
| general rules and guidelines.  Several progressions of IBIS documents are
| referenced in Section 2 and in the discussion below.  They are IBIS Version
| 1.1 (ratified August 1993), IBIS Version 2.1 (ratified as ANSI/EIA-656 in
| December 1995), IBIS Version 3.2 (ratified as ANSI/EIA-656-A in October
| 1999 and renewed on August 17, 2005), IBIS Version 4.0 (ratified in July
| 2002), IBIS Version 4.1 (ratified in January 2004), and this document, IBIS
| Version 4.2 (ratified June 2, 2006).
|
| The functionality of IBIS follows in Sections 4 through 8.  Sections 4
| through 6 describe the format of the core functionality of IBIS Version 1.1
| and the extensions in later versions.  The data in these sections are
| contained in .ibs files.  Section 7 describes the package model format of
| IBIS Version 2.1 and a subsequent extension.  Package models can be
| formatted within .ibs files or can be formatted (along with the Section 4
| file header keywords) as .pkg files.  Section 8 contains the Electrical
| Board Description format of IBIS Version 3.2.  Along with Section 4 header
| information, electrical board descriptions must be contained in separate
| .ebd files.
|
| Section 9 contains some notes regarding the extraction conditions and data
| requirements for IBIS files.  This section focuses on implementation
| conditions based on measurement or simulation for gathering the IBIS
| compliant data.
| 
|=============================================================================
|=============================================================================
|
|                                 Section 2
|
|                  S T A T E M E N T    O F    I N T E N T
|
|=============================================================================
|=============================================================================
|
| In order to enable an industry standard method to electronically transport
| IBIS modeling data between semiconductor vendors, EDA tool vendors, and end
| customers, this template is proposed.  The intention of this template is to
| specify a consistent format that can be parsed by software, allowing EDA
| tool vendors to derive models compatible with their own products.
|
| One goal of this template is to represent the current state of IBIS data,
| while allowing a growth path to more complex models / methods (when deemed
| appropriate).  This would be accomplished by a revision of the base
| template, and possibly the addition of new keywords or categories.
|
| Another goal of this template is to ensure that it is simple enough for
| semiconductor vendors and customers to use and modify, while ensuring that
| it is rigid enough for EDA tool vendors to write reliable parsers.
|
| Finally, this template is meant to contain a complete description of the I/O
| elements on an entire component.  Consequently, several models will need to
| be defined in each file, as well as a table that equates the appropriate
| buffer to the correct pin and signal name.
|
| Version 4.0 of this electronic template was finalized by an industry-wide
| group of experts representing various companies and interests.  Regular
| "EIA IBIS Open Forum" meetings were held to accomplish this task.
|
| Commitment to Backward Compatibility.  Version 1.0 is the first valid IBIS
| ASCII file format.  It represents the minimum amount of I/O buffer
| information required to create an accurate IBIS model of common CMOS and
| bipolar I/O structures.  Future revisions of the ASCII file will add items
| considered to be "enhancements" to Version 1.0 to allow accurate modeling
| of new, or other I/O buffer structures.  Consequently, all future revisions
| will be considered supersets of Version 1.0, allowing backward
| compatibility.  In addition, as modeling platforms develop support for
| revisions of the IBIS ASCII template, all previous revisions of the template
| must also be supported.
|
| Version 1.1 update.  The file "ver1_1.ibs" is conceptually the same as the
| 1.0 version of the IBIS ASCII format (ver1_0.ibs).  However, various
| comments have been added for further clarification.
|
| Version 2.0 update.  The file "ver2_0.ibs" maintains backward compatibility
| with Versions 1.0 and 1.1.  All new keywords and elements added in Version
| 2.0 are optional.  A complete list of changes to the specification is in the
| IBIS Version 2.0 Release Notes document ("ver2_0.rn.txt").
|
| Version 2.1 update.  The file "ver2_1.ibs" contains clarification text
| changes, corrections, and two additional waveform parameters beyond Version
| 2.0.
|
| Version 3.0 update.  The file "ver3_0.ibs" adds a number of new keywords and
| functionality.  A complete list of functions can be found on eda.org under
| /pub/ibis/birds/birddir.txt showing the approved Buffer Issue Resolution
| Documents (BIRDs) that have been approved for Version 3.0.
|
| Version 3.1 update.  The file "ver3_1.ibs" contains a major reformatting of
| the document and a simplification of the wording.  It also contains some new
| technical enhancements that were unresolved when Version 3.0 was approved.
|
| Version 3.2 update.  The file "ver3_2.ibs" adds more technical advances and
| also a number of editorial changes documented in 12 BIRDs and also in
| responses to public letter ballot comments.
|
| Version 4.0 update.  This file "ver4_0.ibs" adds more technical advances and
| a few editorial changes documented in 11 BIRDs.
|
| Version 4.1 update.  This file "ver4_1.ibs" adds more technical advances and
| a few editorial changes documented in 10 BIRDs.
|
| Version 4.2 Update.  This file "ver4_2.ibs" adds more technical advances and
| and some editorial changes documented in 13 BIRDs.
|
|=============================================================================
|=============================================================================
|
|                                 Section 3
|
|   G E N E R A L   S Y N T A X   R U L E S   A N D   G U I D E L I N E S
|
|=============================================================================
|=============================================================================
|
| This section contains general syntax rules and guidelines for ASCII IBIS
| files:
|
| 1)  The content of the files is case sensitive, except for reserved
|     words and keywords.
|
| 2)  The following words are reserved words and must not be used for
|     any other purposes in the document:
|         POWER - reserved model name, used with power supply pins,
|         GND   - reserved model name, used with ground pins,
|         NC    - reserved model name, used with no-connect pins,
|         NA    - used where data not available,
|         CIRCUITCALL - used for circuit call references in Section 6b.
|
| 3)  To facilitate portability between operating systems, file names used in
|     the IBIS file must only have lower case characters.  File names should
|     have a basename of no more than forty (40) characters followed by a
|     period ('.') , followed by a file name extension of no more than three
|     characters.  The file name and extension must use characters from the
|     set (space, ' ', 0x20 is not included):
|
|         a b c d e f g h i j k l m n o p q r s t u v w x y z
|         0 1 2 3 4 5 6 7 8 9 _ ^ $ ~ ! # % & - { } ) ( @ ' `
|  
|     The file name and extension are recommended to be lower case on
|     systems that support such names.
|
| 4)  A line of the file may have at most 120 characters, followed by a line
|     termination sequence.  The line termination sequence must be one of the
|     following two sequences: a linefeed character, or a carriage return
|     followed by linefeed character.
|
| 5)  Anything following the comment character is ignored and considered a
|     comment on that line.  The default "|" (pipe) character can be changed
|     by the keyword [Comment Char] to any other character. The [Comment Char]
|     keyword can be used anywhere in the file as desired.
|
| 6)  Keywords must be enclosed in square brackets, [], and must start in
|     column 1 of the line.  No space or tab is allowed immediately after the
|     opening bracket '[' or immediately before the closing bracket ']'.  If
|     used, only one space (' ') or underscore ('_') character separates the
|     parts of a multi-word keyword.
|
| 7)  Underscores and spaces are equivalent in keywords.  Spaces are not
|     allowed in subparameter names.
|
| 8)  Valid scaling factors are:
|         T = tera        k = kilo        n = nano
|         G = giga        m = milli       p = pico
|         M = mega        u = micro       f = femto
|     When no scaling factors are specified, the appropriate base units are
|     assumed.  (These are volts, amperes, ohms, farads, henries, and
|     seconds.)  The parser looks at only one alphabetic character after a
|     numerical entry, therefore it is enough to use only the prefixes to
|     scale the parameters.  However, for clarity, it is allowed to use full
|     abbreviations for the units, (e.g., pF, nH, mA, mOhm).  In addition,
|     scientific notation IS allowed (e.g., 1.2345e-12).
|
| 9)  The I-V data tables should use enough data points around sharply curved
|     areas of the I-V curves to describe the curvature accurately.  In linear
|     regions there is no need to define unnecessary data points.
|
| 10) The use of tab characters is legal, but they should be avoided as much
|     as possible.  This is to eliminate possible complications that might
|     arise in situations when tab characters are automatically converted to
|     multiple spaces by text editing, file transferring and similar software.
|     In cases like that, lines might become longer than 120 characters, which
|     is illegal in IBIS files.     
|
| 11) Currents are considered positive when their direction is into the
|     component.
|
| 12) All temperatures are represented in degrees Celsius.
|
| 13) Important supplemental information is contained in the last section,
|     "NOTES ON DATA DERIVATION METHOD", concerning how data values are
|     derived.
|
| 14) Only ASCII characters, as defined in ANSI Standard X3.4-1986, may be
|     used in an IBIS file.  The use of characters with codes greater than
|     hexadecimal 07E is not allowed.  Also, ASCII control characters
|     (those numerically less than hexadecimal 20) are not allowed, except
|     for tabs or in a line termination sequence. As mentioned in item 10
|     above, the use of tab characters is discouraged.
|
|=============================================================================
|=============================================================================
|
|                               Section 3a
|
|                     K E Y W O R D   H I E R A R C H Y
|
|=============================================================================
|=============================================================================
|
| .ibs FILE
| ---------
|  |-- File Header Section
|  |   ---------------------
|  |     |-- [IBIS Ver]               
|  |     |-- [Comment Char]         
|  |     |-- [File Name]              
|  |     |-- [File Rev]               
|  |     |-- [Date] 
|  |     |-- [Source]
|  |     |-- [Notes]
|  |     |-- [Disclaimer]
|  |     |-- [Copyright]             
|  |
|  |-- [Component]                          Si_location, Timing_location
|  |   -----------
|  |     |-- [Manufacturer]
|  |     |-- [Package]                      R_pkg, L_pkg, C_pkg
|  |     |-- [Pin]                          signal_name, model_name, R_pin,
|  |     |                                  L_pin, C_pin
|  |     |-- [Package Model]
|  |     |   ---------------
|  |     |     |-- [Alternate Package Models]         
|  |     |         --------------------------
|  |     |           |-- [End Alternate Package Models]
|  |     |
|  |     |-- [Pin Mapping]                  pulldown_ref, pullup_ref,
|  |     |                                  gnd_clamp_ref, power_clamp_ref,
|  |     |                                  ext_ref
|  |     |-- [Diff Pin]                     inv_pin, vdiff, tdelay_typ,
|  |     |                                  tdelay_min, tdelay_max
|  |     |-- [Series Pin Mapping]           pin_2, model_name,
|  |     |                                  function_table_group
|  |     |-- [Series Switch Groups]         On, Off
|  |     |
|  |     |-- [Node Declarations]
|  |     |   -------------------
|  |     |     |-- [End Node Declarations] 
|  |     |
|  |     |-- [Circuit Call]                 Signal_pin, Diff_signal_pins, 
|  |         --------------                 Series_pins, Port_map
|  |           |-- [End Circuit Call] 
|  |
|  |-- [Model Selector]           
|  |
|  |-- [Model]                              Model_type, Polarity, Enable,
|  |   -------                              Vinl, Vinh, C_comp, C_comp_pullup, 
|  |     |                                  C_comp_pulldown,
|  |     |                                  C_comp_power_clamp, 
|  |     |                                  C_comp_gnd_clamp
|  |     |                                  Vmeas, Cref, Rref, Vref
|  |     |                                  Rref_diff, Cref_diff
|  |     |
|  |     |-- [Model Spec]                   Vinh, Vinl, Vinh+, Vinh-, Vinl+,
|  |     |                                  Vinl-, S_overshoot_high,
|  |     |                                  S_overshoot_low, D_overshoot_high,
|  |     |                                  D_overshoot_low, D_overshoot_time,
|  |     |                                  Pulse_high, Pulse_low, Pulse_time,
|  |     |                                  Vmeas, Cref, Rref, Cref_rising, 
|  |     |                                  Cref_falling, Rref_rising, 
|  |     |                                  Rref_falling, Vref_rising, 
|  |     |                                  Vref_falling, Vmeas_rising, 
|  |     |                                  Vmeas_falling, 
|  |     |                                  Rref_diff, Cref_diff
|  |     |-- [Receiver Thresholds]          Vth, Vth_min, Vth_max, Vinh_ac, 
|  |     |                                  Vinh_dc, Vinl_ac, Vinl_dc,
|  |     |                                  Threshold_sensitivity, 
|  |     |                                  Reference_supply, Vcross_low,
|  |     |                                  Vcross_high, Vdiff_ac, Vdiff_dc, 
|  |     |                                  Tslew_ac, Tdiffslew_ac
|  |     |-- [Add Submodel]         
|  |     |-- [Driver Schedule]       
|  |     |-- [Temperature Range]     
|  |     |-- [Voltage Range]
|  |     |-- [Pullup Reference]      
|  |     |-- [Pulldown Reference]    
|  |     |-- [POWER Clamp Reference] 
|  |     |-- [GND Clamp Reference]   
|  |     |-- [External Reference]     
|  |     |-- [TTgnd]                 
|  |     |-- [TTpower]               
|  |     |-- [Pulldown]
|  |     |-- [Pullup]
|  |     |-- [GND Clamp]
|  |     |-- [POWER Clamp]
|  |     |-- [Rgnd]                  
|  |     |-- [Rpower]                
|  |     |-- [Rac]                   
|  |     |-- [Cac]                   
|  |     |-- [On]                    
|  |     |-- [Off]                   
|  |     |-- [R Series]              
|  |     |-- [L Series]              
|  |     |-- [Rl Series]             
|  |     |-- [C Series]              
|  |     |-- [Lc Series]             
|  |     |-- [Rc Series]             
|  |     |-- [Series Current]        
|  |     |-- [Series MOSFET]                Vds
|  |     |-- [Ramp]                         dV/dt_r, dV/dt_f,
|  |     |                                  R_load
|  |     |-- [Rising Waveform]              R_fixture, V_fixture,
|  |     |                                  V_fixture_min, V_fixture_max,
|  |     |                                  C_fixture, L_fixture, R_dut,
|  |     |                                  L_dut, C_dut
|  |     |-- [Falling Waveform]             R_fixture, V_fixture,
|  |     |                                  V_fixture_min, V_fixture_max,
|  |     |                                  C_fixture, L_fixture, R_dut,
|  |     |                                  L_dut, C_dut
|  |     |-- [Test Data]                    Test_data_type, Driver_model, 
|  |     |   -----------                    Driver_model_inv, Test_load
|  |     |     |--[Rising Waveform Near]
|  |     |     |--[Falling Waveform Near]
|  |     |     |--[Rising Waveform Far]
|  |     |     |--[Falling Waveform Far]
|  |     |     |--[Diff Rising Waveform Near]
|  |     |     |--[Diff Falling Waveform Near]
|  |     |     |--[Diff Rising Waveform Far]
|  |     |     |--[Diff Falling Waveform Far]
|  |     |     |--[Test Load]               Test_load_type, C1_near, Rs_near, 
|  |     |                                  Ls_near, C2_near, Rp1_near, 
|  |     |                                  Rp2_near, Td, Zo, Rp1_far,
|  |     |                                  Rp2_far, C2_far, Ls_far, Rs_far,
|  |     |                                  C1_far, V_term1, V_term2,
|  |     |                                  Receiver_model,
|  |     |                                  Receiver_model_inv, R_diff_near, 
|  |     |                                  R_diff_far
|  |     |
|  |     |-- [External Model]               Language, Corner, Parameters,
|  |         ----------------               Ports, D_to_A, A_to_D
|  |           |-- [End External Model]      
|  |
|  |-- [Submodel]                           Submodel_type
|  |   ----------
|  |     |-- [Submodel Spec]                V_trigger_r, V_trigger_f,
|  |     |                                  Off_delay
|  |     |-- [POWER Pulse Table]     
|  |     |-- [GND Pulse Table]     
|  |     |-- [Pulldown]
|  |     |-- [Pullup]
|  |     |-- [GND Clamp]
|  |     |-- [POWER Clamp]
|  |     |-- [Ramp]                        dV/dt_r, dV/dt_f, R_load
|  |     |-- [Rising Waveform]             R_fixture, V_fixture,
|  |     |                                 V_fixture_min, V_fixture_max,
|  |     |                                 C_fixture, L_fixture, R_dut, L_dut,
|  |     |                                 C_dut
|  |     |-- [Falling Waveform]            R_fixture, V_fixture,
|  |                                       V_fixture_min, V_fixture_max,
|  |                                       C_fixture, L_fixture, R_dut, L_dut,
|  |                                       C_dut
|  |    
|  |-- [External Circuit]                  Language, Corner, Parameters,
|  |   ------------------                  Ports, D_to_A, A_to_D
|  |     |-- [End External Circuit]  
|  |
|  |-- [Define Package Model]
|  |   ----------------------
|  |     |-- [Manufacturer]
|  |     |-- [OEM]
|  |     |-- [Description]
|  |     |-- [Number Of Sections]
|  |     |-- [Number Of Pins]
|  |     |-- [Pin Numbers]                  Len, L, R, C, Fork, Endfork
|  |     |-- [Model Data]
|  |     |   ------------
|  |     |     |-- [Resistance Matrix]      Banded_matrix, Sparse_matrix,
|  |     |     |   -------------------      Full_matrix
|  |     |     |     |-- [Bandwidth]
|  |     |     |     |-- [Row] 
|  |     |     |
|  |     |     |-- [Inductance Matrix]      Banded_matrix, Sparse_matrix,
|  |     |     |   -------------------      Full_matrix
|  |     |     |     |-- [Bandwidth]
|  |     |     |     |-- [Row] 
|  |     |     |
|  |     |     |-- [Capacitance Matrix]     Banded_matrix, Sparse_matrix,
|  |     |     |   --------------------     Full_matrix
|  |     |     |     |-- [Bandwidth]
|  |     |     |     |-- [Row] 
|  |     |     |
|  |     |     |-- [End Model Data]
|  |     |
|  |     |-- [End Package Model]
|  |
|  |-- [End]
|
|
|.pkg FILE
|---------
|  |-- File Header Section
|  |   ----------------
|  |     |-- [IBIS Ver]
|  |     |-- [Comment Char]
|  |     |-- [File Name]
|  |     |-- [File Rev]                  
|  |     |-- [Date]
|  |     |-- [Source]
|  |     |-- [Notes]
|  |     |-- [Disclaimer]
|  |     |-- [Copyright]
|  |
|  |-- [Define Package Model]
|  |   ----------------------
|  |     |-- [Manufacturer]
|  |     |-- [OEM]
|  |     |-- [Description]
|  |     |-- [Number Of Sections]
|  |     |-- [Number Of Pins]
|  |     |-- [Pin Numbers]                  Len, L, R, C, Fork, Endfork
|  |     |-- [Model Data]
|  |     |   ------------
|  |     |     |-- [Resistance Matrix]      Banded_matrix, Sparse_matrix,
|  |     |     |   -------------------      Full_matrix
|  |     |     |     |-- [Bandwidth]
|  |     |     |     |-- [Row]
|  |     |     |
|  |     |     |-- [Inductance Matrix]      Banded_matrix, Sparse_matrix,
|  |     |     |   -------------------      Full_matrix
|  |     |     |     |-- [Bandwidth]
|  |     |     |     |-- [Row]
|  |     |     |
|  |     |     |-- [Capacitance Matrix]     Banded_matrix, Sparse_matrix,
|  |     |     |   --------------------     Full_matrix
|  |     |     |     |-- [Bandwidth]
|  |     |     |     |-- [Row] 
|  |     |     |
|  |     |     |-- [End Model Data]
|  |     |
|  |     |-- [End Package Model]
|  |
|  |-- [End]
|
|
|.ebd FILE                                    
|---------
|  |-- File Header Section 
|  |   -----------------
|  |     |-- [IBIS Ver]
|  |     |-- [Comment Char]               
|  |     |-- [File Name]
|  |     |-- [File Rev]
|  |     |-- [Date]
|  |     |-- [Source]
|  |     |-- [Notes]                       
|  |     |-- [Disclaimer]
|  |     |-- [Copyright]
|  |
|  |-- [Begin Board Description]
|  |   -------------------------
|  |     |-- [Manufacturer]
|  |     |-- [Number of Pins]
|  |     |-- [Pin List]                      signal_name
|  |     |-- [Path Description]              Len, L, R, C, Fork, Endfork, Pin,
|  |     |                                   Node 
|  |     |-- [Reference Designator Map]
|  |     |-- [End Board Description]
|  |
|  |-- [End]
|
|=============================================================================
|=============================================================================
|
|                                 Section 4
|
|                F I L E    H E A D E R    I N F O R M A T I O N
|
|=============================================================================
|=============================================================================
|     Keyword:  [IBIS Ver]
|    Required:  Yes
| Description:  Specifies the IBIS template version.  This keyword informs
|               electronic parsers of the kinds of data types that are
|               present in the file.
| Usage Rules:  [IBIS Ver] must be the first keyword in any IBIS file.  It is
|               normally on the first line of the file, but can be preceded
|               by comment lines that must begin with a "|".
|-----------------------------------------------------------------------------
[IBIS Ver]      4.2                     | Used for template variations
|
|=============================================================================
|     Keyword:  [Comment Char]
|    Required:  No
| Description:  Defines a new comment character to replace the default
|               "|" (pipe) character, if desired.
| Usage Rules:  The new comment character to be defined must be followed by
|               the underscore character and the letters "char".  For example:
|               "|_char" redundantly redefines the comment character to be
|               the pipe character.  The new comment character is in effect
|               only following the [Comment Char] keyword.  The following
|               characters MAY be used:
|
|                   ! " # $ % & ' ( ) * , : ; < > ? @ \ ^ ` { | } ~ 
|
| Other Notes:  The [Comment Char] keyword can be used anywhere in the file,
|               as desired.
|-----------------------------------------------------------------------------
[Comment Char]  |_char
|
|=============================================================================
|     Keyword:  [File Name]
|    Required:  Yes
| Description:  Specifies the name of the IBIS file.
| Usage Rules:  The file name must conform to the rules in paragraph 3 of
|               Section 3, GENERAL SYNTAX RULES AND GUIDELINES.  In addition,
|               the file name must use the extension ".ibs", ".pkg", or
|               or ".ebd".  The file name must be the actual name of the file.
|-----------------------------------------------------------------------------
[File Name]     ver4_1.ibs
|
|=============================================================================
|     Keyword:  [File Rev]
|    Required:  Yes
| Description:  Tracks the revision level of a particular .ibs file.
| Usage Rules:  Revision level is set at the discretion of the engineer
|               defining the file.  The following guidelines are recommended:
|                   0.x     silicon and file in development
|                   1.x     pre-silicon file data from silicon model only
|                   2.x     file correlated to actual silicon measurements
|                   3.x     mature product, no more changes likely
|-----------------------------------------------------------------------------
[File Rev]      1.0                     | Used for .ibs file variations
|
|=============================================================================
|    Keywords:  [Date], [Source], [Notes], [Disclaimer], [Copyright]
|    Required:  No
| Description:  Optionally clarifies the file.
| Usage Rules:  The keyword arguments can contain blanks, and be of any
|               format.  The [Date] keyword argument is limited to a maximum
|               of 40 characters, and the month should be spelled out for
|               clarity.
|
|               Because IBIS model writers may consider the information in
|               these keywords essential to users, and sometimes legally
|               required, design automation tools should make this information
|               available.  Derivative models should include this text
|               verbatim.  Any text following the [Copyright] keyword must be
|               included in any derivative models verbatim.
|-----------------------------------------------------------------------------
[Date]          June 2, 2006          | The latest file revision date
|
[Source]        Put originator and the source of information here.  For
                example:

                From silicon level SPICE model at Intel.
                From lab measurement at IEI.
                Compiled from manufacturer's data book at Quad Design, etc.
|
[Notes]         Use this section for any special notes related to the file.
|
[Disclaimer]    This information is for modeling purposes only, and is not
                guaranteed.                     | May vary by component
|
[Copyright]     Copyright 2006, XYZ Corp., All Rights Reserved
|
|=============================================================================
|=============================================================================
|
|                                 Section 5
|
|                 C O M P O N E N T    D E S C R I P T I O N
|
|=============================================================================
|=============================================================================
|     Keyword:  [Component]
|    Required:  Yes
| Description:  Marks the beginning of the IBIS description of the integrated
|               circuit named after the keyword.
|  Sub-Params:  Si_location, Timing_location
| Usage Rules:  If the .ibs file contains data for more than one component,
|               each section must begin with a new [Component] keyword.  The
|               length of the component name must not exceed 40 characters,
|               and blank characters are allowed.
|
|               NOTE: Blank characters are not recommended due to usability
|               issues.
|
|               Si_location and Timing_location are optional and specify where
|               the Signal Integrity and Timing measurements are made for the
|               component.  Allowed values for either subparameter are 'Die'
|               or 'Pin'.  The default location is at the 'Pin'.
|-----------------------------------------------------------------------------
[Component]     7403398 MC452
|
Si_location     Pin    | Optional subparameters to give measurement
Timing_location Die    | location positions   
|
|=============================================================================
|     Keyword:  [Manufacturer]
|    Required:  Yes
| Description:  Specifies the name of the component's manufacturer.
| Usage Rules:  The length of the manufacturer's name must not exceed 40
|               characters (blank characters are allowed, e.g., Texas
|               Instruments).  In addition, each manufacturer must use a
|               consistent name in all .ibs files.
|-----------------------------------------------------------------------------
[Manufacturer]  Intel Corp.
|
|=============================================================================
|     Keyword:  [Package]
|    Required:  Yes
| Description:  Defines a range of values for the default packaging
|               resistance, inductance, and capacitance of the component pins.
|  Sub-Params:  R_pkg, L_pkg, C_pkg
| Usage Rules:  The typical (typ) column must be specified.  If data for the
|               other columns are not available, they must be noted with "NA".
| Other Notes:  If RLC parameters are available for individual pins, they can
|               be listed in columns 4-6 under keyword [Pin].  The values
|               listed in the [Pin] description section override the default
|               values defined here.  Use the [Package Model] keyword for more
|               complex package descriptions.  If defined, the [Package Model]
|               data overrides the values in the [Package] keyword.
|               Regardless, the data listed under the [Package] keyword must
|               still contain valid data.
|-----------------------------------------------------------------------------
[Package]
| variable      typ             min             max
R_pkg           250.0m          225.0m          275.0m
L_pkg           15.0nH          12.0nH          18.0nH
C_pkg           18.0pF          15.0pF          20.0pF
|
|=============================================================================
|     Keyword:  [Pin]
|    Required:  Yes
| Description:  Associates the component's I/O models to its various external
|               pin names and signal names.
|  Sub-Params:  signal_name, model_name, R_pin, L_pin, C_pin
| Usage Rules:  All pins on a component must be specified.  The first column
|               must contain the pin name.  The second column, signal_name,
|               gives the data book name for the signal on that pin.  The
|               third column, model_name, maps a pin to a specific I/O buffer
|               model or model selector name.  Each model_name must have a  
|               corresponding model or model selector name listed in a [Model] 
|               or [Model Selector] keyword below, unless it is a reserved
|               model name (POWER, GND, or NC).
|
|               The model_name column cannot be used for model or model
|               selector names that reference Series and Series_switch models.
|
|               Each line must contain either three or six columns.  A pin
|               line with three columns only associates the pin's signal and
|               model.  Six columns can be used to override the default
|               package values (specified under [Package]) FOR THAT PIN ONLY.
|               When using six columns, the headers R_pin, L_pin, and C_pin
|               must be listed.  If "NA" is in columns 4 through 6, the
|               default packaging values must be used.  The headers R_pin,
|               L_pin, and C_pin may be listed in any order.
|
|               Column length limits are:
|                   [Pin]         5 characters max
|                   model_name   40 characters max
|                   signal_name  40 characters max
|                   R_pin         9 characters max
|                   L_pin         9 characters max
|                   C_pin         9 characters max
|
|-----------------------------------------------------------------------------
[Pin]   signal_name     model_name      R_pin   L_pin   C_pin
|
  1     RAS0#           Buffer1         200.0m  5.0nH   2.0pF
  2     RAS1#           Buffer2         209.0m  NA      2.5pF
  3     EN1#            Input1          NA      6.3nH   NA
  4     A0              3-state
  5     D0              I/O1
  6     RD#             Input2          310.0m  3.0nH   2.0pF
  7     WR#             Input2
  8     A1              I/O2
  9     D1              I/O2
 10     GND             GND             297.0m  6.7nH   3.4pF
 11     RDY#            Input2
 12     GND             GND             270.0m  5.3nH   4.0pF
|  .
|  .
|  .
 18     Vcc3            POWER
 19     NC              NC
 20     Vcc5            POWER           226.0m  NA      1.0pF
 21     BAD1            Series_switch1     |   Illegal assignment
 22     BAD2            Series_selector1   |   Illegal assignment
|
|=============================================================================
|     Keyword:  [Package Model]
|    Required:  No
| Description:  Indicates the name of the package model to be used for the
|               component.
| Usage Rules:  The package model name is limited to 40 characters.  Spaces
|               are allowed in the name.  The name should include the company
|               name or initials to help ensure uniqueness.  The EDA tool
|               will search for a matching package model name as an argument
|               to a [Define Package Model] keyword in the current IBIS file
|               first.  If a match is not found, the EDA tool will next look
|               for a match in an external .pkg file.  If the matching package
|               model is in an external .pkg file, it must be located in the
|               same directory as the .ibs file.  The file names of .pkg files
|               must follow the rules for file names given in Section 3,
|               GENERAL SYNTAX RULES AND GUIDELINES.
| Other Notes:  Use the [Package Model] keyword within a [Component] to
|               indicate which package model should be used for that
|               component.  The specification permits .ibs files to contain
|               [Define Package Model] keywords as well.  These are described
|               in the "Package Modeling" section near the end of this
|               specification.  When package model definitions occur within a
|               .ibs file, their scope is "local", i.e., they are known only 
|               within that .ibs file and no other.  In addition, within that
|               .ibs file, they override any globally defined package models
|               that have the same name.
|-----------------------------------------------------------------------------
[Package Model]     QS-SMT-cer-8-pin-pkgs
|
|=============================================================================
|    Keywords:  [Alternate Package Models], [End Alternate Package Models]
|    Required:  No
| Description:  Used to select a package model from a list of package models.
| Usage Rules:  The [Alternate Package Models] keyword can be used in addition
|               to the [Package Model] keyword.  [Alternate Package Models]
|               shall be used only for components that use the [Package Model]
|               keyword.
|
|               Each [Alternate Package Models] keyword specifies a set of
|               alternate package model names for only one component, which
|               is given by the previous [Component] keyword.  The [Alternate
|               Package Models] keyword shall not appear before the first
|               [Component] keyword in an IBIS file.  The [Alternate Package
|               Models] keyword applies only to the [Component] section in
|               which it appears, and must be followed by an [End Alternate
|               Package Models] keyword.
|
|               All alternate package model names must appear below the
|               [Alternate Package Models] keyword, and above the following
|               [End Alternate Package Models] keyword.  The package model
|               names listed under the [Alternate Package Models] must follow
|               the rules of the package model names associated with the
|               [Package Model] keyword.  The package model names correspond
|               to the names of package models defined by [Define Package
|               Model] keywords.  EDA tools may offer users a facility
|               for choosing between the default package model and any of the
|               alternate package models, when analyzing occurrences of the
|               [Component].
|
|               The package model named by [Package Model] can be optionally
|               repeated in the [Alternate Package Models] list of names.
|-----------------------------------------------------------------------------
[Alternate Package Models]
|
208-pin_plastic_PQFP_package-even_mode | Descriptive names are shown
208-pin_plastic_PQFP_package-odd_mode
208-pin_ceramic_PQFP_package-even_mode 
208-pin_ceramic_PQFP_package-odd_mode
|
[End Alternate Package Models]
|
|=============================================================================
|     Keyword:  [Pin Mapping]
|    Required:  No
| Description:  Used to indicate the power and/or ground buses to which a
|               given driver, receiver or terminator is connected.
|  Sub-Params:  pulldown_ref, pullup_ref, gnd_clamp_ref, power_clamp_ref,  
|               ext_ref
| Usage Rules:  The [Pin Mapping] keyword names the connections between POWER 
|               and/or GND pins and buffer and/or terminator voltage supply
|               references using unique bus labels.  All buses with identical
|               labels are assumed to be connected with an ideal short.  Each 
|               label must be associated with at least one pin whose
|               model_name is POWER or GND.  Bus labels must not exceed 15
|               characters.
|
|               Each line must contain either three, five or six entries.
|               Use the reserved word NC where an entry is required but a bus
|               connection is not made (see below).
|
|               The first column contains a pin name.  Each pin name must 
|               match one of the pin names declared in the [Pin] section of
|               the [Component].  
|
|               For buffers and terminators, the remaining columns correspond
|               to the voltage supply references for the named pin.  Each
|               [Model] supply reference is connected to a particular bus
|               through a bus label in the corresponding column.
|
|               The second column, pulldown_ref, designates the ground bus
|               connections for the buffer or termination associated with that
|               pin.  The bus named under pulldown_ref is associated with the
|               [Pulldown] I-V table for non-ECL [Model]s.  This is also the
|               bus associated with the [GND Clamp] I-V table and the [Rgnd] 
|               model unless overridden by a label in the gnd_clamp_ref
|               column.
|
|               The third column, pullup_ref, designates the power bus 
|               connection for the buffer or termination.  The bus named under
|               pullup_ref is associated with the [Pullup] table for non-ECL 
|               [Model]s (for ECL models, this bus is associated with the 
|               [Pulldown] table).  This is also the bus label associated with
|               the [POWER Clamp] I-V table and the [Rpower] model unless
|               overridden by a label in the power_clamp_ref column.
|
|               The fourth and fifth columns, gnd_clamp_ref and
|               power_clamp_ref, contain entries, if needed, to specify 
|               additional ground bus and power bus connections for clamps.
|               Finally, the sixth column, ext_ref, contains entries to 
|               specify external reference supply bus connections.  
|
|               The usage of the columns changes for GND and POWER pins.  For
|               GND pins, the pulldown_ref column contains the name of the bus
|               to which the pin connects; the pullup_ref column in this case
|               must contain the reserved word NC.  Similarly, for POWER
|               (including external reference) pins, the pullup_ref column
|               contains the name of the bus to which the pin connects; the
|               pulldown_ref column in this case must contain the reserved
|               word NC.
|
|               If the [Pin Mapping] keyword is present, then the bus
|               connections for EVERY pin listed under the [Pin] keyword must
|               be given.
|
|               If a pin has no connection, then both the pulldown_ref and
|               pullup_ref subparameters for it will be NC.
|
|               The column length limits are:
|                      [Pin Mapping]     5 characters max
|                      pulldown_ref     15 characters max
|                      pullup_ref       15 characters max
|                      gnd_clamp_ref    15 characters max
|                      power_clamp_ref  15 characters max
|                      ext_ref          15 characters max
|
|               For compatibility with models developed under previous IBIS
|               versions, [Pin Mapping] lines which contain ext_ref column 
|               entries must also explicitly include entries for the 
|               pulldown_ref, pullup_ref, gnd_clamp_ref and power_clamp_ref 
|               columns.  These entries can be NC, as explained above.
|
|               When six columns of data are specified, the headings 
|               gnd_clamp_ref, power_clamp_ref and ext_ref must be used on 
|               the line containing the [Pin Mapping] keyword.  Otherwise, 
|               these headings can be omitted.
|
|----------------------------------------------------------------------------
[Pin Mapping] pulldown_ref pullup_ref gnd_clamp_ref power_clamp_ref ext_ref
|
1               GNDBUS1    PWRBUS1   | Signal pins and their associated
2               GNDBUS2    PWRBUS2   | ground, power and external 
|                                    | reference connections
3               GNDBUS1    PWRBUS1      GNDCLMP        PWRCLAMP
4               GNDBUS2    PWRBUS2      GNDCLMP        PWRCLAMP
5               GNDBUS2    PWRBUS2      NC             PWRCLAMP REFBUS1
6               GNDBUS2    PWRBUS2      GNDCLMP        NC
7               GNDBUS2    PWRBUS2      GNDCLMP        NC       REFBUS2
|                                    | Some possible clamping 
|                                    | connections are shown above 
|  .                                 | for illustration purposes
|  .
11              GNDBUS1    NC        | One set of ground connections.
12              GNDBUS1    NC        | NC indicates no connection to
13              GNDBUS1    NC        | power bus.
|  .    
21              GNDBUS2    NC        | Second set of ground connections
22              GNDBUS2    NC
23              GNDBUS2    NC
|  .    
31              NC         PWRBUS1   | One set of power connections.
32              NC         PWRBUS1   | NC indicates no connection to
33              NC         PWRBUS1   | ground bus.
|  .
41              NC         PWRBUS2   | Second set of power connections
42              NC         PWRBUS2
43              NC         PWRBUS2
|  .
51              GNDCLMP    NC        | Additional power connections
52              NC         PWRCLMP   | for clamps
|
|  .
71              NC         REFBUS1   | External reference connections
72              NC         REFBUS2   
|
| The following [Pin] list corresponds to the [Pin Mapping] shown above.
|
[Pin] signal_name model_name R_pin L_pin C_pin
| 
1     OUT1         output_buffer1      | Output buffers 
2     OUT2         output_buffer2      |
3     IO3          io_buffer1          | Input/output buffers
4     IO4          io_buffer2          | 
5     SPECIAL1     ref_buffer1         | Buffers with POWER CLAMP but no 
6     SPECIAL2     io_buffer_term1     | GND CLAMP I-V tables; two use 
7     SPECIAL3     ref_buffer2         | external reference voltages
11    VSS1          GND 
12    VSS1          GND 
13    VSS1          GND 
21    VSS2          GND 
22    VSS2          GND 
23    VSS2          GND 
31    VCC1          POWER
32    VCC1          POWER
33    VCC1          POWER
41    VCC2          POWER
42    VCC2          POWER
43    VCC2          POWER
51    VSSCLAMP      GND                | Power connections for clamps
52    VCCCLAMP      POWER              |
71    V_EXTREF1     POWER              | External reference voltage pins
72    V_EXTREF2     POWER              |
|
|=============================================================================
|     Keyword:  [Diff Pin]
|    Required:  No
| Description:  Associates differential pins and defines their differential
|               receiver threshold voltage and differential driver timing
|               delays.
|  Sub-Params:  inv_pin, vdiff, tdelay_typ, tdelay_min, tdelay_max
| Usage Rules:  Enter only differential pin pairs.  The first column, [Diff
|               Pin], contains a non-inverting pin name.  The second column,
|               inv_pin, contains the corresponding inverting pin name for
|               I/O output.  Each pin name must match the pin names declared
|               previously in the [Pin] section of the IBIS file.  The third
|               column, vdiff, contains the specified differential receiver
|               threshold voltage between the inverting and non-inverting
|               pins for Input or I/O model types.  The fourth, fifth, and
|               sixth columns, tdelay_typ, tdelay_min, and tdelay_max,
|               contain launch delays of the non-inverting pins relative to
|               the inverting pins.  All of the numerical entries may be a
|               positive, zero, or negative number.
|
|               For differential Input or I/O model types, the differential
|               input threshold (vdiff) overrides and supersedes the need
|               for Vinh and Vinl.
|
| Other Notes:  The output pin polarity specification in the table overrides
|               the [Model] Polarity specification such that the pin in the
|               [Diff Pin] column is Non-Inverting and the pin in the inv_pin
|               column is Inverting.  This convention enables one [Model] to
|               be used for both pins.
|
|               The column length limits are:
|                   [Diff Pin]     5 characters max
|                   inv_pin        5 characters max
|                   vdiff          9 characters max
|                   tdelay_typ     9 characters max
|                   tdelay_min     9 characters max
|                   tdelay_max     9 characters max
|
|               Each line must contain either four or six columns.  Using
|               four columns is an equivalent of entering "NA"s in the fifth
|               and sixth columns.  An "NA" in the vdiff column will be 
|               interpreted as a 200 mV default differential receiver
|               threshold.  "NA"s in the tdelay_typ, or tdelay_min columns
|               are interpreted as 0 ns.  If "NA" appears in the
|               tdelay_max column, its value is interpreted as the tdelay_typ
|               value.  When using six columns, the headers tdelay_min and
|               tdelay_max must be listed.  Entries for the tdelay_min column
|               are based on minimum magnitudes; and tdelay_max column,
|               maximum magnitudes.  One entry of vdiff, regardless of its
|               polarity, is used for difference magnitudes.
|
|               The positioning of numerical entries and/or "NA" must not be
|               used as an indication for the model type.  The model type is
|               determined by the model type parameter inside the [Model]s
|               referenced by the [Diff Pin] keyword, regardless of what the
|               [Diff Pin]'s entries are.  The simulator may ignore the
|               vdiff or the tdelay_*** parameters if not needed by the
|               model type of the [Model], or use the default values defined
|               above if they are needed but not provided in the [Diff Pin]
|               keyword.  For example, an "NA" in the third column (vdiff)
|               does not imply that the model type is Output, or three
|               "NA"-s in the tdelay columns does not mean that the model
|               type is Input.
|   
|               Note that the starting point of the flight time measurements
|               will occur when the differential driver's output waveforms
|               are crossing, i.e. when the differential output voltage is 
|               zero, and consequently Vmeas, if defined will be ignored.
|-----------------------------------------------------------------------------
[Diff Pin]  inv_pin  vdiff  tdelay_typ tdelay_min tdelay_max
|
 3           4       150mV    -1ns       0ns      -2ns
| For Input,  tdelay_typ/min/max ignored
| For Output, vdiff ignored
|
 7           8         0V      1ns        NA        NA
16          15       200mV     1ns
| For Input,  tdelay_typ ignored
| For Output, vdiff ignored and tdelay_min = 0ns and tdelay_max = 1ns
| For I/O,    tdelay_min = 0ns and tdelay_max = 1ns
|
 9          10         NA       NA        NA        NA
22          21         NA       NA
| For Input,  vdiff = 200 mV
| For Output, tdelay_typ/min/max = 0ns
| For I/O,    vdiff = 200 mV and tdelay_typ/min/max = 0ns
|
20          19         0V       NA
| For Output, vdiff ignored and tdelay_typ/min/max = 0ns
| For I/O,    tdelay_typ/min/max = 0ns
|
|===========================================================================
|     Keyword:  [Series Pin Mapping]
|    Required:  No
| Description:  Used to associate two pins joined by a series model.
|  Sub-Params:  pin_2, model_name, function_table_group
| Usage Rules:  Enter only series pin pairs.  The first column, [Series Pin
|               Mapping], contains the series pin for which input impedances
|               are measured.  The second column, pin_2, contains the other
|               connection of the series model.  Each pin must match the pin
|               names declared previously in the [Pin] section of the IBIS
|               file.  The third column, model_name, associates models of
|               type Series or Series_switch, or model selectors containing
|               references to models of type Series or Series_switch for
|               the pair of pins in the first two columns.  Each model_name
|               must have a corresponding model or model selector name 
|               listed in a [Model] or [Model Selector] keyword below.  The
|               usage of reserved model names (POWER, GND, or NC) within the
|               [Series Pin Mapping] keyword is not allowed.  The fourth
|               column, function_table_group, contains an alphanumeric
|               designator string to associate those sets of Series_switch
|               pins that are switched together.
|
|               Each line must contain either three or four columns.  When
|               using four columns, the header function_table_group must be
|               listed.  
|
|               One possible application is to model crossbar switches where
|               the straight through On paths are indicated by one 
|               designator and the cross over On paths are indicated by 
|               another designator.  If the model referenced is a Series 
|               model, then the function_table_group entry is omitted.
| 
|               The column length limits are:
|                   [Series Pin Mapping]       5 characters max
|                   pin_2                      5 characters max
|                   model_name                40 characters max
|                   function_table_group      20 characters max
|
| Other Notes:  If the model_name is for a non-symmetrical series model, 
|               then the order of the pins is important.  The [Series Pin
|               Mapping] and pin_2 entries must be in the columns that
|               correspond with Pin 1 and Pin 2 of the referenced model.
|
|               This mapping covers only the series paths between pins.  The
|               package parasitics and any other elements such as additional
|               capacitance or clamping circuitry are defined by the
|               model_name that is referenced in the [Pin] keyword.  The
|               model_names under the [Pin] keyword that are also referenced
|               by the [Series Pin Mapping] keyword may include any legal
|               model or reserved model except for Series and Series_switch
|               models.  Normally the pins will reference a [Model] whose
|               Model_type is 'Terminator'.  For example, a Series_switch
|               model may contain Terminator models on EACH of the pins to
|               describe both the capacitance on each pin and some clamping
|               circuitry that may exist on each pin.  In a similar manner,
|               Input, I/O or Output models may exist on each pin of a 
|               Series model that is serving as a differential termination.
|
|               Also, a pin name may appear on more than one entry under the
|               [Series Pin Mapping] keyword.  This allows for multiple and
|               perhaps different models or model selectors to be placed
|               between the same, or any arbitrary pin pair combinations.
|---------------------------------------------------------------------------
[Series Pin Mapping]  pin_2    model_name      function_table_group
|
  2                    3       CBTSeries       1    | Four independent groups
  5                    6       CBTSeries       2
  9                    8       CBTSeries       3    
  12                  11       CBTSeries       4
|
  22                  23       CBTSeries       5    | Straight through path
  25                  26       CBTSeries       5
  22                  26       CBTSeries       6    | Cross over path
  25                  23       CBTSeries       6
| 
  32                  33       Fixed_series         | No group needed
|
|=============================================================================
|     Keyword:  [Series Switch Groups]
|    Required:  Yes, if function_table_group column data is present under 
|               [Series Pin Mapping]
| Description:  Used to define allowable switching combinations of series
|               switches described using the names of the groups in the
|               [Series Pin Mapping] keyword function_table_group column. 
|  Sub-Params:  On, Off
| Usage Rules:  Each state line contains an allowable configuration.  A 
|               typical state line will start with 'On' followed by all of the
|               on-state group names or an 'Off' followed by all of the
|               off-state group names.  Only one of 'On' or 'Off' is required
|               since the undefined states are presumed to be opposite of the
|               explicitly defined states.  The state line is terminated with
|               the slash '/', even if it extends over several lines to fit
|               within the 120 character column width restriction.
|
|               The group names in the function_table_group are used to
|               associate switches whose switching action is synchronized by
|               a common control function.  The first line defines the assumed
|               (default) state of the set of series switches.  Other sets of
|               states are listed and can be selected through a user interface
|               or through automatic control.
|---------------------------------------------------------------------------
[Series Switch Groups]
| Function Group States
On 1 2 3 4 /           | Default setting is all switched On
|
Off 1 2 3 4 /          | All Off setting
On 1 /                 | Other possible combinations below
On 2 /
On 3 /
On 4 /
On 1 2 /
On 1 3 /
On 1 4 /
On 2 3 /
On 2 4 /
On 3 4 /
On 1 2 3 /
On 1 2 4 /
On 1 3 4 /
On 2 3 4 /
| Off 4 /              | The last four lines above could have been replaced   
| Off 3 /              | with these four lines with the same meaning.
| Off 2 / 
| Off 1 /
|
On 5 /                 | Crossbar switch straight through connection
On 6 /                 | Crossbar cross over connection
Off 5 6 /              | Crossbar open switches
|
|=============================================================================
|     Keyword:  [Model Selector]
|    Required:  No
| Description:  Used to pick a [Model] from a list of [Model]s for a pin which
|               uses a programmable buffer.
| Usage Rules:  A programmable buffer must have an individual [Model] section
|               for each one of its modes used in the .ibs file.  The names of
|               these [Model]s must be unique and can be listed under the
|               [Model Selector] keyword and/or pin list.  The name of the
|               [Model Selector] keyword must match the corresponding model
|               name listed under the [Pin] or [Series Pin Mapping] keyword
|               and must not contain more than 40 characters.  A .ibs file
|               must contain enough [Model Selector] keywords to cover all of
|               the model selector names specified under the [Pin] and [Series
|               Pin Mapping] keywords.
|
|               The section under the [Model Selector] keyword must have two
|               fields.  The two fields must be separated by at least one
|               white space.  The first field lists the [Model] name (up to 40
|               characters long).  The second field contains a short
|               description of the [Model] shown in the first field.  The
|               contents and format of this description is not standardized,
|               however it shall be limited in length so that none of the
|               descriptions exceed the 120-character length of the line that
|               it started on. The purpose of the descriptions is to aid the
|               user of the EDA tool in making intelligent buffer mode
|               selections and it can be used by the EDA tool in a user
|               interface dialog box as the basis of an interactive buffer
|               selection mechanism.
|
|               The first entry under the [Model Selector] keyword shall be
|               considered the default by the EDA tool for all those
|               pins which call this [Model Selector].
|
|               The operation of this selection mechanism implies that a group
|               of pins which use the same programmable buffer (i.e., model
|               selector name) will be switched together from one [Model] to
|               another.  Therefore, if two groups of pins, for example an
|               address bus and a data bus, use the same programmable buffer,
|               and the user must have the capability to configure them
|               independently, one can use two [Model Selector] keywords with
|               unique names and the same list of [Model] keywords; however,
|               the usage of the [Model Selector] is not limited to these
|               examples.  Many other combinations are possible.
|-----------------------------------------------------------------------------
[Pin]   signal_name     model_name      R_pin   L_pin   C_pin
|
  1     RAS0#           Progbuffer1     200.0m  5.0nH   2.0pF
  2     EN1#            Input1          NA      6.3nH   NA
  3     A0              3-state
  4     D0              Progbuffer2
  5     D1              Progbuffer2     320.0m  3.1nH   2.2pF
  6     D2              Progbuffer2
  7     RD#             Input2          310.0m  3.0nH   2.0pF
|  .
|  .
|  .
  18     Vcc3            POWER
| 
[Model Selector]        Progbuffer1
|
OUT_2       2 mA buffer without slew rate control
OUT_4       4 mA buffer without slew rate control
OUT_6       6 mA buffer without slew rate control
OUT_4S      4 mA buffer with slew rate control
OUT_6S      6 mA buffer with slew rate control
|
[Model Selector]        Progbuffer2
|
OUT_2       2 mA buffer without slew rate control
OUT_6       6 mA buffer without slew rate control
OUT_6S      6 mA buffer with slew rate control
OUT_8S      8 mA buffer with slew rate control
OUT_10S    10 mA buffer with slew rate control
|
|=============================================================================
|=============================================================================
|
|                                 Section 6
|
|                       M O D E L    S T A T E M E N T
|
|=============================================================================
|=============================================================================
|     Keyword:  [Model] 
|    Required:  Yes
| Description:  Used to define a model, and its attributes.
|  Sub-Params:  Model_type, Polarity, Enable, Vinl, Vinh, C_comp,
|               C_comp_pullup, C_comp_pulldown, C_comp_power_clamp,
|               C_comp_gnd_clamp, Vmeas, Cref, Rref, Vref
| Usage Rules:  Each model type must begin with the keyword [Model].  The
|               model name must match the one that is listed under a [Pin],
|               [Model Selector] or [Series Pin Mapping] keyword and must
|               not contain more than 40 characters.  A .ibs file must 
|               contain enough [Model] keywords to cover all of the model
|               names specified under the [Pin], [Model Selector] and [Series
|               Pin Mapping] keywords, except for those model names that use
|               reserved words (POWER, GND and NC).
|
|               Model_type must be one of the following:
|
|                 Input, Output, I/O, 3-state, Open_drain, I/O_open_drain,
|                 Open_sink, I/O_open_sink, Open_source, I/O_open_source,
|                 Input_ECL, Output_ECL, I/O_ECL, 3-state_ECL, Terminator,
|                 Series, and Series_switch.
|
|               For true differential models documented under Section 6b,
|               Model_type must be one of the following:
|
|               Input_diff, Output_diff, I/O_diff, and 3-state_diff
|
|               Special usage rules apply to the following.  Some
|               definitions are included for clarification:
|
|               Input              These model types must have Vinl and Vinh
|               I/O                defined.  If they are not defined, the
|               I/O_open_drain     parser issues a warning and the default
|               I/O_open_sink      values of Vinl = 0.8 V and Vinh = 2.0 V
|               I/O_open_source    are assumed.
|
|               Input_ECL          These model types must have Vinl and Vinh
|               I/O_ECL            defined.  If they are not defined, the
|                                  parser issues a warning and the default
|                                  values of Vinl = -1.475 V and Vinh =
|                                  -1.165 V are assumed.
|
|               Terminator         This model type is an input-only model
|                                  that can have analog loading effects on the
|                                  circuit being simulated but has no digital
|                                  logic thresholds.  Examples of terminators
|                                  are: capacitors, termination diodes, and
|                                  pullup resistors.
|
|               Output             This model type indicates that an output
|                                  always sources and/or sinks current and
|                                  cannot be disabled.
|
|               3-state            This model type indicates that an output
|                                  can be disabled, i.e., put into a high
|                                  impedance state.
|
|               Open_sink          These model types indicate that the output
|               Open_drain         has an OPEN side (do not use the [Pullup]
|                                  keyword, or if it must be used, set I =
|                                  0 mA for all voltages specified) and the
|                                  output SINKS current.  Open_drain model
|                                  type is retained for backward
|                                  compatibility.
|
|               Open_source        This model type indicates that the output
|                                  has an OPEN side (do not use the [Pulldown]
|                                  keyword, or if it must be used, set I =
|                                  0 mA for all voltages specified) and the
|                                  output SOURCES current.
|
|               Input_ECL          These model types specify that the model
|               Output_ECL         represents an ECL type logic that follows
|               I/O_ECL            different conventions for the [Pulldown]
|               3-state_ECL        keyword.
|
|               Series             This model type is for series models that
|                                  can be described by [R Series], [L Series],
|                                  [Rl Series], [C Series], [Lc Series],
|                                  [Rc Series], [Series Current] and [Series
|                                  MOSFET] keywords.
|                                 
|               Series_switch      This model type is for series switch
|                                  models that can be described by [On],
|                                  [Off], [R Series], [L Series], [Rl Series],
|                                  [C Series], [Lc Series], [Rc Series],
|                                  [Series Current] and [Series MOSFET]
|                                  keywords.
|
|               Input_diff         These model types specify that the model
|               Output_diff        defines a true differential model available
|               I/O_diff           directly through the [External Model]
|               3-state_diff       keyword documented in Section 6b.
|
|               The Model_type subparameter is required.
|
|               The C_comp subparameter is required only when C_comp_pullup,
|               C_comp_pulldown, C_comp_power_clamp, and C_comp_gnd_clamp are
|               not present.  If the C_comp subparameter is not present, at
|               least one of the C_comp_pullup, C_comp_pulldown,
|               C_comp_power_clamp, or C_comp_gnd_clamp subparameters is
|               required.  It is not illegal to include the C_comp 
|               subparameter together with one or more of the remaining
|               C_comp_* subparameters, but in that case the simulator will
|               have to make a decision whether to use C_comp or the
|               C_comp_pullup, C_comp_pulldown, C_comp_power_clamp, and
|               C_comp_gnd_clamp subparameters.  Under no circumstances should
|               the simulator use the value of C_comp simultaneously with the
|               values of the other C_comp_* subparameters.
|
|               C_comp_pullup, C_comp_pulldown, C_comp_power_clamp, and
|               C_comp_gnd_clamp are intended to represent the parasitic
|               capacitances of those structures whose I-V characteristics
|               are described by the [Pullup], [Pulldown], [POWER Clamp] and
|               [GND Clamp] I-V tables.  For this reason, the simulator
|               should generate a circuit netlist so that, if defined, each of
|               the C_comp_* capacitors are connected in parallel with their
|               corresponding I-V tables, whether or not the I-V table exists.
|               That is, the C_comp_* capacitors are positioned between the 
|               signal pad and the nodes defined by the [Pullup Reference],
|               [Pulldown Reference], [POWER Clamp Reference] and [GND Clamp
|               Reference] keywords, or the [Voltage Range] keyword and GND.
|
|               The C_comp and C_comp_* subparameters define die capacitance.
|               These values should not include the capacitance of the
|               package. C_comp and C_comp_* are allowed to use "NA" for the
|               min and max values only.
|
|               The Polarity, Enable, Vinl, Vinh, Vmeas, Cref, Rref, and Vref
|               subparameters are optional.
|
|               Also, optional Rref_diff and Cref_diff subparameters discussed
|               further in Section 6b support the true differential buffer
|               timing test loads.  They are used only when the [Diff Pin]
|               keyword connects two models, and each buffer references the
|               same model.  The Rref_diff and Cref_diff subparameters can be
|               used with the Rref, Cref, and Vref subparameters for a
|               combined differential and signal-ended timing test load.
|               Single-ended test loads are permitted for differential
|               applications.
|
|               The Rref_diff and Cref_diff are recognized only when the
|               [Diff Pin] keyword connects the models.  This applies for the
|               true differential buffers in Section 6b and also for
|               differential buffers using identical single-ended models.
|
|               The Polarity subparameter can be defined as either
|               Non-Inverting or Inverting, and the Enable subparameter can be
|               defined as either Active-High or Active-Low.
|
|               The Cref and Rref subparameters correspond to the test load
|               that the semiconductor vendor uses when specifying the
|               propagation delay and/or output switching time of the model.
|               The Vmeas subparameter is the timing reference voltage level
|               that the semiconductor vendor uses for the model.  Include
|               Cref, Rref, Vref, and Vmeas information to facilitate
|               board-level timing simulation.  The assumed connections for
|               Cref, Rref, and Vref are shown in the following diagram:
|
|                            _________
|                           |         |
|                           |      |\ |            Rref
|                           |Driver| \|------o----/\/\/\----o Vref
|                           |      | /|      |
|                           |      |/ |     === Cref
|                           |_________|      |
|                                            |
|                                           GND
|
|               A single-ended or true differential buffer can have Rref_diff
|               and Cref_diff.:
|
|                            _________
|                           |         |
|                           |      |\ |                Rref
|                           |Driver| \|--o---o---o----/\/\/\--o Vref
|                           |      | /|  |   |   |
|                           |      |/ |  |   |  === Cref
|                           |_________|  /   |   |
|                                        \   |  GND
|                              Rref_diff /  === 
|                            _________   \   | Cref_diff
|                           |         |  |   | 
|                           |      |\ |  |   |         Rref
|                           |Driver| \|--o---o---o----/\/\/\--o Vref
|                           |      | /|          |
|                           |      |/ |         === Cref
|                           |_________|          |
|                                               GND
|
|                                             
| Other Notes:  A complete [Model] description normally contains the following
|               keywords:  [Voltage Range], [Pullup], [Pulldown], [GND Clamp],
|               [POWER Clamp], and [Ramp].  A Terminator model may use the
|               [Rgnd], [Rpower], [Rac], and [Cac] keywords.  However, some
|               models may have only a subset of these keywords.  For example,
|               an input structure normally only needs the [Voltage Range],
|               [GND Clamp], and possibly the [POWER Clamp] keywords.  If any 
|               of [Rgnd], [Rpower], [Rac], and [Cac] keywords is used, then
|               the Model_type must be Terminator.
|
|-----------------------------------------------------------------------------
| Signals       CLK1, CLK2,...         | Optional signal list, if desired
[Model]         Clockbuffer
Model_type      I/O
Polarity        Non-Inverting
Enable          Active-High
Vinl = 0.8V                            | Input logic "low" DC voltage, if any
Vinh = 2.0V                            | Input logic "high" DC voltage, if any
Vmeas = 1.5V              | Reference voltage for timing measurements
Cref = 50pF               | Timing specification test load capacitance value
Rref = 500                | Timing specification test load resistance value
Vref = 0                  | Timing specification test load voltage
| variable         typ             min             max
C_comp             7.0pF           5.0pF           9.0pF
|
C_comp_pullup      3.0pF           2.5pF           3.5pF | These four can be
C_comp_pulldown    2.0pF           1.5pF           2.5pF | used instead of
C_comp_power_clamp 1.0pF           0.5pF           1.5pF | C_comp
C_comp_gnd_clamp   1.0pF           0.5pF           1.5pF
|
| For a single-ended or true differential buffer (in Section 6b)
|
[Model]         External_Model_Diff
Model_type      I/O_diff               | Requires [External Model]
Polarity        Non-Inverting
Enable          Active-High
| The [Diff Pin] vdiff value overrides the thresholds below
Vinl = 0.8V                            | Input logic "low" DC voltage, if any
Vinh = 2.0V                            | Input logic "high" DC voltage, if any
|                         | The true differential measurement point is at 
|                         | the crossover voltage
|                         | The Vmeas value is overridden
Vmeas = 1.5V              | Reference voltage for timing measurements
|                         | Single-ended timing test load is still permitted
Cref = 5pF                | Timing specification test load capacitance value
Rref = 500                | Timing specification test load resistance value
Vref = 0                  | Timing specification test load voltage
|                         | These new subparameters are permitted for
|                         | single-ended differential operation based on the
|                         | [Diff Pin] keyword
Rref_diff = 100           | Timing specification differential resistance value
Cref_diff = 5pF           | Timing specification differential capacitance value
|
|=============================================================================
|     Keyword:  [Model Spec]
|    Required:  No
|  Sub-Params:  Vinh, Vinl, Vinh+, Vinh-, Vinl+, Vinl-, S_overshoot_high,
|               S_overshoot_low, D_overshoot_high, D_overshoot_low,
|               D_overshoot_time, Pulse_high, Pulse_low, Pulse_time, Vmeas,
|               Vref, Cref, Rref, Cref_rising, Cref_falling, Rref_rising,
|               Rref_falling, Vref_rising, Vref_falling, Vmeas_rising, 
|               Vmeas_falling, Rref_diff, Cref_diff
| Description:  The [Model Spec] keyword defines four columns under which
|               specification subparameters are defined.  
|               
|               The following subparameters are defined:
|               Vinh               Input voltage threshold high
|               Vinl               Input voltage threshold low
|               Vinh+              Hysteresis threshold high max Vt+
|               Vinh-              Hysteresis threshold high min Vt+
|               Vinl+              Hysteresis threshold low max Vt-
|               Vinl-              Hysteresis threshold low min Vt-
|               S_overshoot_high   Static overshoot high voltage
|               S_overshoot_low    Static overshoot low voltage
|               D_overshoot_high   Dynamic overshoot high voltage
|               D_overshoot_low    Dynamic overshoot low voltage
|               D_overshoot_time   Dynamic overshoot time
|               Pulse_high         Pulse immunity high voltage
|               Pulse_low          Pulse immunity low voltage
|               Pulse_time         Pulse immunity time
|               Vmeas              Measurement voltage for timing measurements
|               Vref               Timing specification test load voltage
|               Cref               Timing specification capacitive load
|               Rref               Timing specification resistance load
|               Cref_rising        Timing specification capacitive load for
|                                  rising edges
|               Cref_falling       Timing specification capacitive load for
|                                  falling edges
|               Rref_rising        Timing specification resistance load for
|                                  rising edges
|               Rref_falling       Timing specification resistance load for
|                                  falling edges
|               Vref_rising        Timing specification test load voltage for
|                                  rising edges
|               Vref_falling       Timing specification test load voltage for
|                                  falling edges
|               Vmeas_rising       Measurement voltage for rising edge timing
|                                  measurements
|               Vmeas_falling      Measurement voltage for falling edge timing
|                                  measurements
|               Rref_diff          Timing specification differential
|                                  resistance load
|               Cref_diff          Timing specification differential
|                                  capacitive load
|
| Usage Rules:  [Model Spec] must follow all subparameters under the [Model] 
|               keyword and precede all other keywords of a model.
|
|               For each subparameter contained in the first column, the 
|               remaining three hold its typical, minimum and maximum values.
|               The entries of typical, minimum and maximum must be placed on
|               a single line and must be separated by at least one white
|               space.  All four columns are required under the [Model Spec]
|               keyword.  However, data is required only in the typical
|               column.  If minimum and/or maximum values are not available,
|               the reserved word "NA" must be used indicating the typical
|               value by default.
|
|               The minimum and maximum values are used for specifications
|               subparameter values that may track the min and max operation
|               conditions of the [Model].  For example, some subparameter
|               values might change with the [Voltage Range] settings for each
|               column.
|
|               Unless noted below, no subparameter requires having present
|               any other subparameter.
|      
|               Vinh, Vinl rules:
| 
|               The threshold subparameter lines provide additional min and
|               max column values, if needed.  The typ column values are still
|               required and would be expected to override the Vinh and Vinl
|               subparameter values specified elsewhere.  Note: the syntax
|               rule that require inserting Vinh and Vinl under models remains
|               unchanged even if the values are defined under the [Model
|               Spec] keyword.
|
|               Vinh+, Vinh-, Vinl+, Vinl- rules:
|
|               The four hysteresis subparameters (used for Schmitt trigger
|               inputs for defining two thresholds for the rising edges and
|               two thresholds for falling edges) must all be defined before
|               independent input thresholds for rising and falling edges of
|               the hysteresis threshold rules become effective.  Otherwise
|               the standard threshold subparameters remain in effect.  The
|               hysteresis thresholds shall be at the Vinh+ and Vinh- values
|               for a low-to-high transition, and at the Vinl+ and Vinl-
|               values for a high-to-low transition.
|
|         |
|         |           Receiver Voltage with Hysteresis Thresholds
|         |
|         |
|         |       Rising Edge                            Falling Edge
|         |    Switching Region   oo    o              Switching Region
|         |                  |  o    oo  ooooooooo           |
|         |                  V o                    o        |
|  Vinh+  - - - - - - - - - - x                        o     |
|  Vinh-  - - - - - - - - -  x                           o   |
|         |                 o                             o  |
|         |                o                               o |
|         |               o                                 oV
|  Vinl+  - - - - - - -  o - - - - - - - - - - - - - - - - - x
|  Vinl-  - - - - - - - o  - - - - - - - - - - - - - - - - -  x
|         |           o                                         o
|         |        o                                               o
|         |oooooo-----------------------------------------------------oooooooo
|
|                                       Time -->
|
|               S_overshoot_high, S_overshoot_low rules:
|
|               The static overshoot subparameters provide the DC voltage
|               values for which the model is no longer guaranteed to function
|               correctly.  Typically these are voltages that would cause the
|               physical component to be destroyed.
|
|               D_overshoot_high, D_overshoot_low, D_overshoot_time rules:
|
|               The dynamic overshoot values provide a time window during
|               which the overshoot may exceed the static overshoot limits
|               but be below the dynamic overshoot limits.  D_overshoot_time
|               is required for dynamic overshoot testing.  In addition, if
|               D_overshoot_high is specified, then S_overshoot_high is
|               necessary for testing beyond the static limit.  Similarly, if
|               D_overshoot_low is specified, then S_overshoot_low is
|               necessary for testing beyond the static limit.
|                
|         |
|         |     Receiver Voltage with Static and Dynamic Overshoot Limits
|         |
|         |
|         |   D_overshoot_time ->|      |<-
|         |                      |      |
|  D_overshoot_high - - - - - - -+ - - -+                       
|         |                      | oo   |  Passes - Does Not Exceed Bounds
|         |                      |o  o  |
|  S_overshoot_high - - - - - - -x    o +- - - - - - - - - - - - - - - - - - -
|         |                     o      o ooooooooo 
|         |                    o        o         o
|         |                   o                    o
|         |                  o                      o
|         |                 o                        o
|         |                o                          o
|         |               o                            o
|         |              o                              o        Fails -
|         |             o                                o    Exceeds Bounds
|         |           o                                   o      |   |  |
|         |        o                                       o     V   V  V
|         |oooooo-------------------------------------------o---------o---oooo
|  S_overshoot_low - - - - - - - - - - - - - - - - - - - - - x      +x x x - -
|         |                                                  |o     x   x
|         |                                                  | o   o|
|  D_overshoot_low - - - - - - - - - - - - - - - - - - - - - + -x x-+
|         |                                                  |   x  |
|                                         D_overshoot_time ->|      |<-
|
|                                       Time -->
|
|               Pulse_high, Pulse_low, Pulse_time rules:
|
|               The pulse immunity values provide a time window during which
|               a rising pulse may exceed the nearest threshold value but
|               be below the pulse voltage value and still not cause the
|               input to switch.  Pulse_time is required for pulse immunity
|               testing.  A rising response is tested only if Pulse_high is
|               specified.  Similarly, a falling response is tested only if
|               Pulse_low is specified.  The rising response may exceed the
|               Vinl value, but remain below the Pulse_high value.
|
|               Similarly, the falling response may drop below the Vinh value,
|               but remain above the Pulse_low value.  In either case the
|               input is regarded as immune to switching if the responses
|               are within these extended windows.  If the hysteresis
|               thresholds are defined, then the rising response shall use
|               Vinh- as the reference voltage, and the falling response shall
|               use Vinl+ as the reference voltage.
|
|         |
|         |         Receiver Voltage with Pulse Immunity Thresholds
|         |
|         |
|         |            Switching                           No Switching
|         |                |                               |
|         |                |      oo    o                  |  Switching
|         |                |    o    oo  ooooooooo         |      |
|         |                |   o                    o      |      | 
|         |                V  o                       o    V   oooV
|  Vinh - - - - - - - - - -  x - - - - - - - - - - - - - x   o + -x
|         | Pulse_time ->|  o  |<-                       |ooo  |   o
|  Pulse_high - - - - -  + o - +            Pulse_low  - + - - +    o   
|         |              |o    |            Pulse_time ->|     |<-   o       
|  Vinl - - - - - - - -  x     + - - - - - - - - - - - - - - - - - -  x
|         |             o                                              o
|         |           o                                                 o
|         |        o                                                      o
|         |oooooo------------------------------------------------------------o
|
|                                       Time -->
|
|               Vmeas, Vref, Cref, Rref rules:
|  
|               The Vmeas, Vref, Cref and Rref values under the [Model Spec]
|               keyword override their respective values entered elsewhere.
|               Note that a Vmeas, Vref, Cref or Rref subparameters may not be
|               used if its edge specific version (*_rising or *_falling) is
|               used.
|  
|               Cref_rising, Cref_falling, Rref_rising, Rref_falling,
|               Vref_rising, Vref_falling, Vmeas_rising, Vmeas_falling rules:
|  
|               Use these subparameters when specifying separate timing test
|               loads and voltages for rising and falling edges.  If one
|               'rising' or 'falling' subparameter is used, then the
|               corresponding 'rising' or 'falling' subparameter must be
|               present.  The values listed in these subparameters override 
|               any corresponding Cref, Vref, Rref or Vmeas values entered
|               elsewhere.
|
|               Rref_diff, Cref_diff rules:
| 
|               The Rref_diff and Creff_diff values under the [Model Spec]
|               keyword override their respective values entered elsewhere.
|               These subparameters are used only when the model is referenced
|               by the [Diff Pin] keyword.  These follow the same rules as
|               the corresponding subparameters documented under the [Model]
|               keyword.  See Section 6b for more discussion on true and
|               single-ended differential operation.
|-----------------------------------------------------------------------------
[Model Spec]
|   Subparameter          typ        min        max
|
| Thresholds
|
Vinh                      3.5        3.15       3.85    | 70% of Vcc
Vinl                      1.5        1.35       1.65    | 30% of Vcc
|
| Vinh                    3.835       3.335     4.335   | Offset from Vcc
| Vinl                    3.525       3.025     4.025   | for PECL
|
| Hysteresis
|
Vinh+                     2.0        NA         NA      | Overrides the
Vinh-                     1.6        NA         NA      | thresholds
Vinl+                     1.1        NA         NA 
Vinl-                     0.6        NA         NA      | All 4 are required
|
| Overshoot
|
S_overshoot_high          5.5        5.0        6.0     | Static overshoot
S_overshoot_low          -0.5        NA         NA
D_overshoot_high          6.0        5.5        6.5     | Dynamic overshoot
D_overshoot_low          -1.0       -1.0       -1.0     | requires
|                                                       | D_overshoot_time 
D_overshoot_time          20n        20n        20n     | & static overshoot
|
| Pulse Immunity
|
Pulse_high                3V         NA         NA      | Pulse immunity
Pulse_low                 0          NA         NA      | requires
Pulse_time                3n         NA         NA      | Pulse_time
|
| Timing Thresholds
|
Vmeas                     3.68       3.18       4.68    | A 5 volt PECL
|                                                       | example
|
| Timing test load voltage reference example
|
Vref                      1.25       1.15       1.35    | An SSTL-2 example
|
|
| Rising and falling timing test load example (values from PCI-X
| specification)
|
Cref_falling              10p        10p         10p
Cref_rising               10p        10p         10p
Rref_rising               25         500         25  | typ value not specified
Rref_falling              25         500         25  | typ value not specified
Vref_rising               0          1.5         0     
Vref_falling              3.3        1.5         3.6   
Vmeas_rising              0.941      0.885       1.026 | vmeas = 0.285(vcc)
Vmeas_falling             2.0295     1.845       2.214 | vmeas = 0.615(vcc)
|   
| Differential timing test load for true or single-ended differential model
| 
Rref_diff                 100        90         110
Cref_diff                 5pF        NA         NA
|
|=============================================================================
|     Keyword:  [Receiver Thresholds]
|    Required:  No
|  Sub-Params:  Vth, Vth_min, Vth_max, Vinh_ac, Vinh_dc, Vinl_ac, Vinl_dc,
|               Threshold_sensitivity, Reference_supply, Vcross_low, 
|               Vcross_high, Vdiff_ac, Vdiff_dc, Tslew_ac, Tdiffslew_ac
| Description:   The [Receiver Thresholds] keyword defines both a set of
|               receiver input thresholds as well as their sensitivity to
|               variations in a referenced supply.  The subparameters are
|               defined as follows:
|
|               Vth, Vth_min and Vth_max are the ideal input threshold
|               voltages at which the output of a digital logic receiver 
|               changes state.  Vth is the nominal input threshold voltage
|               under the voltage, temperature and process conditions that
|               define 'typ'.  Vth_min is the minimum input threshold 
|               voltage at 'typ' conditions while Vth_max is the maximum
|               input threshold voltage at 'typ' conditions.
|
|               Vinh_ac is the voltage that a low-to-high going input 
|               waveform must reach in order to guarantee that the
|               receiver's output has changed state.  In other words, 
|               reaching Vinh_ac is sufficient to guarantee a receiver 
|               state change. Vinh_ac is expressed as an offset from Vth.
|
|               Vinh_dc is the voltage that an input waveform must remain
|               above (more positive than) in order to guarantee that a
|               receiver output will NOT change state.  Vinh_dc is 
|               expressed as an offset from Vth.
|
|               Vinl_ac is the voltage that a high-to-low going input 
|               waveform must reach in order to guarantee that the 
|               receiver's output has changed state.  In other words, 
|               reaching Vinl_ac is sufficient to guarantee a receiver 
|               state change.  Vinl_ac is expressed as an offset from Vth.
|
|               Vinl_dc is the voltage that an input waveform must remain
|               below (more negative than) in order to guarantee that a 
|               receiver's output will NOT change state.  Vinl_dc is 
|               expressed as an offset from Vth.
|
|               Threshold_sensitivity is a unit less number that specifies
|               how Vth varies with respect to the supply voltage defined 
|               by the Reference_supply subparameter. Threshold_sensitivity
|               is defined as:
|
|                                       change in input threshold voltage
|               Threshold_sensitivity = -----------------------------------
|                                       change in referenced supply voltage
|
|               Threshold_sensitivity must be entered as a whole number or
|               decimal, not as a fraction.
|
|               Reference_supply indicates which supply voltage Vth tracks;
|               i.e., it indicates which supply voltage change causes a 
|               change in input threshold.  The legal arguments to this 
|               subparameter are as follows:
|
|               Power_clamp_ref  The supply voltage defined by the
|                                [POWER Clamp Reference] keyword
|               Gnd_clamp_ref    The supply voltage defined by the 
|                                [GND Clamp Reference] keyword
|               Pullup_ref       The supply voltage defined by the
|                                [Pullup reference] keyword
|               Pulldown_ref     The supply voltage defined by the
|                                [Pulldown reference] keyword
|               Ext_ref          The supply voltage defined by the 
|                                [External Reference] keyword
|
|               Tslew_ac and Tdiffslew_ac measures the absolute difference 
|               in time between the point at which an input waveform 
|               crosses Vinl_ac and the point it crosses Vinh_ac.  The 
|               purpose of this parameter is to document the maximum amount
|               of time an input signal may take to transition between 
|               Vinh_ac and Vinl_ac and still allow the device to meet its 
|               input setup and hold specifications.  Tslew_ac is the 
|               parameter used for single ended receivers while
|               Tdiffslew_ac must be used for receivers with differential 
|               inputs. 
|               
|               Vcross_low is the least positive voltage at which a 
|               differential receivers' input signals may cross while 
|               switching and still allow the receiver to meet its timing 
|               and functional specifications.  Vcross_low is specified
|               with respect to 0 V.
|
|               Vcross_high is the most positive voltage at which a 
|               differential receivers' input signals may cross while 
|               switching and still allow the receiver to meet its timing 
|               and functional specifications.  Vcross_high is specified
|               with respect to 0 V.
|
|               Vdiff_dc is the minimum voltage difference between the 
|               inputs of a differential receiver that guarantees the
|               receiver will not change state.
|
|               Vdiff_ac is the minimum voltage difference between the 
|               inputs of a differential receiver that guarantees the 
|               receiver will change state.
|
| Usage Rules:  [Receiver Thresholds] must follow all subparameters under
|               the [Model] keyword and precede all other keywords of a
|               model except [Model Spec]. 
|
|               The [Receiver Thresholds] keyword is valid if the model type
|               includes any reference to input or I/O.  For single ended
|               receivers the Vinh_ac, Vinh_dc, Vinl_ac, Vinh_dc, Vth and
|               Tslew_ac subparameters are required and override the Vinh,
|               Vinl, Vinh+/- and Vinl+/- subparameters declared under the 
|               [Model] or [Model Spec] keywords.  For single ended receivers
|               the Vth_min, Vth_max, Threshold_sensitivity and
|               Reference_supply subparameters are optional.  However, if 
|               the Threshold_sensitivity subparameter is present then the 
|               Reference_supply subparameter must also be present.
|
|               For differential receivers (i.e., the [Receiver Thresholds]
|               keyword is part of a [Model] statement that describes a pin 
|               listed in the [Diff Pin] keyword) then the Vcross_low,
|               Vcross_high, Vdiff_ac, Vdiff_dc and Tdiffslew_ac subparameters
|               are required.  The rest of the subparameters are not
|               applicable.  The Vdiff_ac and Vdiff_dc values override the
|               value of the vdiff subparameter specified by the [Diff Pin]
|               keyword.  Note that Vcross_low and Vcross_high are valid over
|               the device's minimum and maximum operating  conditions.
|
|               Subparameter Usage Rules:
|               Numerical arguments are separated from their associated
|               subparameter by an equals sign (=); white space around the
|               equals sign is optional.  The argument to the Reference_supply
|               subparameter is separated from the subparameter by white
|               space.
|
|               Vth at Minimum or Maximum Operating Conditions:
|               As described above, the Vth_min and Vth_max subparameters
|               define the minimum and maximum input threshold values under
|               typical operating conditions.  There is no provision for
|               directly specifying Vth under minimum or maximum operating
|               conditions.  Instead, these values are calculated using the
|               following equation:
|
|               Vth(min/max) = Vth* + [(Threshold_sensitivity) X 
|                                                 (change in supply voltage)]
|
|               where Vth* is either Vth, Vth_min or Vth_max as appropriate,
|               and the supply voltage is the one indicated by the
|               Reference_supply subparameter.
|-----------------------------------------------------------------------------
| A basic 3.3 V single ended receiver using only the required subparameters.
|
[Receiver Thresholds]
Vth = 1.5V
Vinh_ac = +225mV
Vinh_dc = +100mV
Vinl_ac = -225mV
Vinl_dc = -100mV
Tslew_ac = 1.2ns
|
| A single ended receiver using an external threshold reference.  In this
| case the input threshold is the external reference voltage so
| Threshold_sensitivity equals 1.
|
[Receiver Thresholds]
Vth = 1.0V
Threshold_sensitivity = 1
Reference_supply Ext_ref
Vinh_ac = +200mV
Vinh_dc = +100mV
Vinl_ac = -200mV
Vinl_dc = -100mV
Tslew_ac = 400ps
|
| A fully specified single ended 3.3 V CMOS receiver
|
[Receiver Thresholds]
Vth = 1.5V
Vth_min = 1.45V
Vth_max = 1.53V
Threshold_sensitivity = 0.45
Reference_supply Power_clamp_ref
Vinh_ac = +200mV
Vinh_dc = +100mV
Vinl_ac = -200mV
Vinl_dc = -100mV
Tslew_ac = 400ps
|
| A differential receiver
|
[Receiver Thresholds]
Vcross_low = 0.65V
Vcross_high = 0.90V
Vdiff_ac = +200mV
Vdiff_dc = +100mV
Tdiffslew_ac = 200ps
|
|=============================================================================
|     Keyword:  [Add Submodel]
|    Required:  No
| Description:  References a submodel to be added to an existing model.
| Usage Rules:  The [Add Submodel] keyword is invoked within a model to add
|               the functionality that is contained in the submodel or list of
|               submodels in each line that follows.  The first column
|               contains the submodel name.  The second column contains a
|               submodel mode under which the submodel is used.
|    
|               If the top-level model type is one of the I/O or 3-state
|               models, the submodel mode may be Driving, Non-Driving, or All.
|               For example, if the submodel mode is Non-Driving, then the
|               submodel is used only in the high-Z state of a 3-state model.
|               Set the submodel mode to All if the submodel is to be used for
|               all modes of operation.
|
|               The submodel mode cannot conflict with the top-level model
|               type.  For example, if the top-level model type is an Open or
|               Output type, the submodel mode cannot be set to Non-Driving.
|               Similarly, if the top-level model type is Input, the submodel
|               mode cannot be set to Driving.
| 
|               The submodel mode can be set to All to cover all permitted
|               modes for any top-level model type including, for example,
|               Input, Output, and I/O.
| 
|
|               The [Add Submodel] keyword is not defined for Series or
|               Series_switch model types.
|
|               Refer to the ADD SUBMODEL DESCRIPTION section in this document
|               for the descriptions of available submodels.
|-----------------------------------------------------------------------------
[Add Submodel]     
| Submodel_name        Mode
Bus_Hold_1             Non-Driving  | Adds the electrical characteristics of
                                    | [Submodel] Bus_Hold_1 for receiver or
                                    | high-Z mode only.
Dynamic_clamp_1        All          | Adds the Dynmanic_clamp_1 model for
                                    | all modes of operation.
|
|=============================================================================
|     Keyword:  [Driver Schedule]
|    Required:  No
| Description:  Describes the relative model switching sequence for referenced
|               models to produce a multi-staged driver.
| Usage Rules:  The [Driver Schedule] keyword establishes a hierarchical order
|               between models and should be placed under the [Model] which 
|               acts as the top-level model.  The scheduled models are then 
|               referenced from the top-level model by the [Driver Schedule]
|               keyword.
|
|               When a multi-staged buffer is modeled using the [Driver
|               Schedule] keyword, all of its stages (including the first
|               stage, or normal driver) have to be modeled as scheduled
|               models.
| 
|               If there is support for this feature in a EDA tool, the
|               [Driver Schedule] keyword will cause it to use the [Pulldown],
|               [Pulldown Reference], [Pullup], [Pullup Reference],
|               [Voltage Range], [Ramp], [Rising Waveform] and
|               [Falling Waveform] keywords from the scheduled models
|               instead of the top-level model, according to the timing
|               relationships described in the [Driver Schedule] keyword.
|               Consequently, the keywords in the above list will be ignored
|               in the top-level model.  All of the remaining keywords not
|               shown in the above list, and all of the subparameters will be
|               used from the top-level model and should be ignored in the
|               scheduled model(s).
| 
|               However, both the top-level and the scheduled model(s) have
|               to be complete models, i.e., all of the required keywords
|               must be present and follow the syntactical rules.
| 
|               For backwards compatibility reasons and for EDA tools which
|               do not support multi-staged switching, the keywords in the
|               above list can be used in the top-level [Model] to describe
|               the overall characteristics of the buffer as if it was a
|               composite model.  It is not guaranteed, however, that such a
|               top-level model will yield the same simulation results as a
|               full multi-stage model.  It is recommended that a "golden
|               waveform" for the device consisting of a [Rising Waveform]
|               table and a [Falling Waveform] table be supplied in the
|               top-level model to serve as a reference for validation.
|
|               Even though some of the keywords are ignored in the scheduled
|               model, it may still make sense in some cases to supply
|               correct data with them.  One such situation would arise when a
|               [Model] is used both as a regular top-level model as well as a
|               scheduled model.
|
|               The [Driver Schedule] table consists of five columns.  The
|               first column contains the model names of other models that
|               exists in the .ibs file.  The remaining four columns describe
|               delays:  Rise_on_dly, Rise_off_dly, Fall_on_dly, and
|               Fall_off_dly.  The t=0 time of each delay is the event when
|               the EDA tool's internal pulse initiates a rising or falling
|               transition.  All specified delay values must be equal to or
|               greater than 0.  There are only five valid combinations in
|               which these delay values can be defined:
| 
|                   1)  Rise_on_dly    with   Fall_on_dly
|                   2)  Rise_off_dly   with   Fall_off_dly
|                   3)  Rise_on_dly    with   Rise_off_dly
|                   4)  Fall_on_dly    with   Fall_off_dly
|                   5)  All four delays defined
|                       (be careful about correct sequencing)
| 
|               The four delay parameters have the meaning as described
|               below.  (Note that this description applies to buffer types
|               which have both pullup and pulldown structures.  For those
|               buffer types which have only a pullup or pulldown structure,
|               the description for the missing structure can be omitted.)
| 
|               Rise_on_dly is the amount of time that elapses from the
|               internal simulator pulse initiating a RISING edge to the
|               t = 0 time of the waveform or ramp that turns the I-V table of
|               the PULLUP device ON, and the t = 0 time of the waveform or
|               ramp that turns the I-V table of the PULLDOWN device OFF (if
|               they were not already turned ON and OFF, respectively, by
|               another event).
| 
|               Rise_off_dly is the amount of time that elapses from the
|               internal simulator pulse initiating a RISING edge to the
|               t = 0 time of the waveform or ramp that turns the I-V table of
|               the PULLUP device OFF, and the t = 0 time of the waveform or
|               ramp that turns the I-V table of the PULLDOWN device ON (if
|               they were not already turned ON and OFF, respectively, by
|               another event).
| 
|               Fall_on_dly is the amount of time that elapses from the
|               internal simulator pulse initiating a FALLING edge to the
|               t = 0 time of the waveform or ramp that turns the I-V table of
|               the PULLDOWN device ON, and the t = 0 time of the waveform or
|               ramp that turns the I-V table of the PULLUP device OFF (if
|               they were not already turned ON and OFF, respectively, by
|               another event).
| 
|               Fall_off_dly is the amount of time that elapses from the
|               internal simulator pulse initiating a FALLING edge to the
|               t = 0 time of the waveform or ramp that turns the I-V table of
|               the PULLDOWN device OFF, and the t = 0 time of the waveform or
|               ramp that turns the I-V table of the PULLUP device ON (if
|               they were not already turned ON and OFF, respectively, by
|               another event).
|
|               In the above four paragraphs, the word "event" refers to 
|               the moment in time when the delay is triggered by the 
|               stimulus.  This stimulus is provided to the top-level 
|               model by the simulation tool.  The expiration of delays 
|               cannot generate events.
|
|               Note that some timing combinations may only be possible if
|               the two halves of a complementary buffer are modeled
|               separately as two open_* models.
|  
|               No [Driver Schedule] table may reference a model which itself
|               has within it a [Driver Schedule] keyword.
|
|               Use 'NA' when no delay value is applicable.  For each
|               scheduled model the transition sequence must be complete,
|               i.e., the scheduled model must return to its initial state.
|
|               Only certain numerical entry combinations are permitted to 
|               define a complete transition sequence.  The table below gives
|               the initial scheduled model states for each permitted set of
|               numerical entries.  The numerical delay entries, r, r1 and r2
|               are relative to the internal simulator pulse rising edge, and
|               f, f1 and f2 are the numerical delay entries relative to
|               internal simulator pulse falling edge.  For the cases where
| 
|               two delays are given relative to the same edge, the r2 entry 
|               is larger than the r1 entry, and the f2 entry is larger than
|               the f1 entry.  For cases below, the interchanging of such 
|               values corresponds to opposite direction switching.  Once the
|               scheduled model is set to its initial state, the switching
|               is controlled by the internal simulator pulse and delays
|               relative to it.
|
|               In the table below the scheduled model initial states depend
|               on the initial state of the [Model].  This top-level [Model]
|               state ('Low' or 'High') is a function of the stimulus pulse
|               (or simulation control method) and the [Model] Polarity
|               subparameter.  For example, if a [Model] Polarity is Inverting
|               and its stimulus pulse starts high, the [Model] initial state 
|               is 'Low' and all scheduled model initial states follow the
|               settings under the 'Low' column.  Two possible four-data
|               ordering combinations are omitted because their initial states
|               are ambiguous.  Special rules to select the initial states
|               would produce sequencing equivalent to the two-data
|               combinations shown in the first two lines of the table.
|
|                           SCHEDULED MODEL INITIAL STATE TABLE
|                 -----------------------------------------------------------
|                   Table Numerical Delay Entries   |  [Model] Initial State
|                 Rise_on Rise_off Fall_on Fall_off |     Low        High
|                 -----------------------------------------------------------
|                    r       NA       f       NA    |     Low        High
|                    NA      r        NA      f     |     High       Low
|                    r1      r2       NA      NA    |     Low        Low
|                    r2      r1       NA      NA    |     High       High
|                    NA      NA       f1      f2    |     High       High
|                    NA      NA       f2      f1    |     Low        Low
|                    r1      r2       f2      f1    |     Low        Low
|                    r2      r1       f1      f2    |     High       High
|                 -----------------------------------------------------------
|
|               The delay numbers r, r1, r2, and f, f1, f2 plus the associated
|               model transitions should fit within the corresponding pulse
|               width durations.  Smaller pulse width stimuli may change the
|               switching sequencing and is not supported.
|
| Other Notes:  The added models typically consist of Open_sink (Open_drain) 
|               or Open_source models to provide sequentially increased drive
|               strengths.  The added drive may be removed within the same
|               transition for a momentary boost or during the opposite 
|               transition.
|
|               The syntax also allows for reducing the drive strength. 
|
|               Note that the Rise_on_dly, Rise_off_dly, Fall_on_dly,
|               Fall_off_dly parameters are single value parameters, so 
|               typical, minimum and maximum conditions cannot be described
|               with them directly.  In order to account for those effects,
|               one can refer to the fastest waveform table with the delay
|               number and then insert an appropriate amount of horizontal
|               lead in section in those waveforms which need more delay.
|
|               Notice that the C_comp parameter of a multi-stage buffer is
|               defined in the top-level model.  The value of C_comp
|               therefore includes the total capacitance of the entire
|               buffer, including all of its stages.  Since the rising and
|               falling waveform measurements include the effects of
|               C_comp, each of these waveforms must be generated with the
|               total C_comp present, even if the various stages of the
|               buffer are characterized individually.
|
|               Note: In a future release, the [Driver Schedule] keyword may
|               be replaced by a newer method of specification that is 
|               consistent with some other planned extensions.  However, the
|               [Driver Schedule] syntax will continue to be supported.
|-----------------------------------------------------------------------------
[Driver Schedule]
| Model_name     Rise_on_dly  Rise_off_dly  Fall_on_dly  Fall_off_dly
  MODEL_OUT      0.0ns        NA            0.0ns        NA
|
| Examples of added multi-staged transitions
  M_O_SOURCE1     0.5ns        NA            0.5ns        NA
|              low (high-Z) to high        high to low (high-Z)
  M_O_SOURCE2    0.5n         1.5n          NA           NA
|               low to high to low           low (high-Z)
  M_O_DRAIN1     1.0n         NA            1.5n         NA
|              low to high (high-Z)        high (high-Z) to low
  M_O_DRAIN2     NA           NA            1.5n         2.0n
|                  high (high-Z)           high to low to high 
|
|=============================================================================
|     Keyword:  [Temperature Range]
|    Required:  Yes, if other than the preferred 0, 50, 100 degree Celsius
|               range
| Description:  Defines the temperature range over which the model is to 
|               operate.
| Usage Rules:  List the actual die temperatures (not percentages) in the typ,
|               min, max format.  "NA" is allowed for min and max only.
| Other Notes:  The [Temperature Range] keyword also describes the temperature
|               range over which the various I-V tables and ramp rates were
|               derived.  Refer to NOTES ON DATA DERIVATION METHODS for rules
|               on which temperature values to put in the 'min' and 'max'
|               columns.
|-----------------------------------------------------------------------------
| variable              typ             min             max
[Temperature Range]     27.0            -50             130.0
|
|=============================================================================
|     Keyword:  [Voltage Range]
|    Required:  Yes, if [Pullup Reference], [Pulldown Reference], [POWER
|               Clamp Reference], and [GND Clamp Reference] are not present
| Description:  Defines the power supply voltage tolerance over which the
|               model is intended to operate.  It also specifies the default
|               voltage rail to which the [Pullup] and [POWER Clamp] I-V data
|               is referenced.
| Usage Rules:  Provide actual voltages (not percentages) in the typ, min, max
|               format.  "NA" is allowed for the min and max values only.
| Other Notes:  If the [Voltage Range] keyword is not present, then all four
|               of the keywords described below must be present: [Pullup
|               Reference], [Pulldown Reference], [POWER Clamp Reference],
|               and [GND Clamp Reference].  If the [Voltage Range] is present,
|               the other keywords are optional and may or may not be used as
|               required.  It is legal (although redundant) for an optional
|               keyword to specify the same voltage as specified by the
|               [Voltage Range] keyword.
|-----------------------------------------------------------------------------
| variable              typ             min             max
[Voltage Range]         5.0V            4.5V            5.5V
|
|=============================================================================
|     Keyword:  [Pullup Reference]
|    Required:  Yes, if the [Voltage Range] keyword is not present
| Description:  Defines a voltage rail other than that defined by the [Voltage
|               Range] keyword as the reference voltage for the [Pullup] I-V
|               data.
| Usage Rules:  Provide actual voltages (not percentages) in the typ, min, max
|               format.  "NA" is allowed for the min and max values only.
| Other Notes:  This keyword, if present, also defines the voltage range over
|               which the typ, min, and max dV/dt_r values are derived.
|-----------------------------------------------------------------------------
| variable              typ             min             max
[Pullup Reference]      5.0V            4.5V            5.5V
|
|=============================================================================
|     Keyword:  [Pulldown Reference]
|    Required:  Yes, if the [Voltage Range] keyword is not present
| Description:  Defines a power supply rail other than 0 V as the reference
|               voltage for the [Pulldown] I-V data.  If this keyword is not
|               present, the voltage data points in the [Pulldown] I-V table
|               are referenced to 0 V.
| Usage Rules:  Provide actual voltages (not percentages) in the typ, min, max
|               format.  "NA" is allowed for the min and max values only.
| Other Notes:  This keyword, if present, also defines the voltage range over
|               which the typ, min, and max dV/dt_f values are derived.
|-----------------------------------------------------------------------------
| variable              typ             min             max
[Pulldown Reference]    0V              0V              0V
|
|=============================================================================
|     Keyword:  [POWER Clamp Reference]
|    Required:  Yes, if the [Voltage Range] keyword is not present
| Description:  Defines a voltage rail other than that defined by the [Voltage
|               Range] keyword as the reference voltage for the [POWER Clamp]
|               I-V data.
| Usage Rules:  Provide actual voltages (not percentages) in the typ, min,
|               max format.  "NA" is allowed for the min and max values only.
| Other Notes:  Refer to the "Other Notes" section of the [GND Clamp
|               Reference] keyword.
|-----------------------------------------------------------------------------
| variable              typ             min             max
[POWER Clamp Reference] 5.0V            4.5V            5.5V
|
|=============================================================================
|     Keyword:  [GND Clamp Reference]
|    Required:  Yes, if the [Voltage Range] keyword is not present
| Description:  Defines a power supply rail other than 0 V as the reference
|               voltage for the [GND Clamp] I-V data.  If this keyword is not
|               present, the voltage data points in the [GND Clamp] I-V table
|               are referenced to 0 V.
| Usage Rules:  Provide actual voltages (not percentages) in the typ, min, max
|               format.  "NA" is allowed for the min and max values only.
| Other Notes:  Power Supplies: It is intended that standard TTL and CMOS
|               models be specified using only the [Voltage Range] keyword.
|               However, in cases where the output characteristics of a model
|               depend on more than a single supply and ground, or a [Pullup],
|               [Pulldown], [POWER Clamp], or [GND Clamp] table is referenced
|               to something other than the default supplies, use the
|               additional 'reference' keywords.
|-----------------------------------------------------------------------------
| variable              typ             min             max
[GND Clamp Reference]   0V              0V              0V
|
|=============================================================================
|     Keyword:  [External Reference]
|    Required:  Yes, if a receiver's input threshold is determined by an
|               external reference voltage
| Description:  Defines a voltage source that supplies the reference voltage
|               used by a receiver for its input threshold reference.
| Usage Notes:  Provide actual voltages (not percentages in the typ, min max
|               format.  "NA" is allowed for the min and max values only.
|               Note that the numerically largest value should be placed in
|               'max' column, while the numerically smallest value should
|               be placed in the 'min' column. 
|-----------------------------------------------------------------------------
| variable              typ          min           max
[External Reference]   1.00V        0.95V         1.05V
|
|=============================================================================
|    Keywords:  [TTgnd], [TTpower]
|    Required:  No
| Description:  These keywords specify the transit time parameters used to
|               estimate the transit time capacitances or develop transit time
|               capacitance tables for the [GND Clamp] and [POWER Clamp]
|               tables.
| Usage Rules:  For each of these keywords, the three columns hold the transit
|               values corresponding to the typical, minimum and maximum [GND
|               Clamp] or [POWER Clamp] tables, respectively.  The entries for
|               TT(typ), TT(min), and TT(max) must be placed on a single line
|               and must be separated by at least one white space.  All three
|               columns are required under these keywords.  However, data is
|               required only in the typical column.  If minimum and/or
|               maximum values are not available, the reserved word "NA" must
|               be used indicating the TT(typ) value by default.
| Other Notes:  The transit time capacitance is added to C_comp.  It is in a
|               SPICE reference model as Ct = TT * d(Id)/d(Vd) where
|               d(Id)/d(Vd) defines the DC conductance at the incremental DC
|               operating point of the diode, and TT is the transit time.
|               This expression does not include any internal series
|               resistance.  Such a resistance is assumed to be negligible in
|               practice.  Assume that the internal diode current (Id) -
|               voltage (Vd) relationship is Id = Is * (exp(q(Vd)/kT) - 1)  
|               where Is is the saturation current, q is electron charge, k is
|               Boltzmann's constant, and T is temperature in degrees Kelvin.
|               Then d(Id)/d(Vd) is approximately (q/kT) * Id when the diode
|               is conducting, and zero otherwise.  This yields the
|               simplification Ct = TT * (q/kT) * Id.  The Id is found from
|               the [GND Clamp] and [POWER Clamp] operating points, and the
|               corresponding TTgnd or TTpower is used to calculate the Ct
|               value.  If the [Temperature Range] keyword is not defined,
|               then use the default "typ" temperature for all Ct
|               calculations.
|
|               The effective TT parameter values are intended to APPROXIMATE
|               the effects.  They may be different from the values found in
|               the SPICE diode equations.  Refer to the NOTES ON DATA 
|               DERIVATION METHOD for extracting the effective values. 
|-----------------------------------------------------------------------------
| variable      TT(typ)         TT(min)         TT(max)
[TTgnd]         10n             12n             9n
[TTpower]       12n             NA              NA
|
|=============================================================================
|    Key