From owner-ibis Fri Mar 6 09:57:19 1998 Received: from mail11.digital.com (mail11.digital.com [192.208.46.10]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id JAA28788 for ; Fri, 6 Mar 1998 09:56:11 -0800 (PST) Received: from sbuamazko2ae.zko.dec.com (sbuamazko2ae.zko.dec.com [16.29.160.92]) by mail11.digital.com (8.8.8/8.8.8/WV1.0c) with ESMTP id MAA30180 for ; Fri, 6 Mar 1998 12:52:13 -0500 (EST) Received: by sbuamazko2ae.zko.dec.com with Internet Mail Service (5.0.1458.49) id ; Fri, 6 Mar 1998 12:51:55 -0500 Message-ID: <71EEA9EA5129D1118EA30000F840EBF138DC1A@sbuamapko3bc.eng.pko.dec.com> From: Greg Edlund To: "'ibis-users@vhdl.org'" Cc: "'Conner, Margery'" , "'si-list@silab.eng.sun.com'" Subject: IBIS Accuracy Sub-Committee Minutes Date: Fri, 6 Mar 1998 12:44:05 -0500 X-Priority: 3 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.0.1458.49) Content-Type: text/plain; charset="iso-8859-1" IBIS Accuracy Sub-Committee Minutes Thursday, March 26, 1998, held at Digital Equipment Corp. in Maynard, MA Attendees: Greg Edlund, Digital Equipment (chair) Fawn Engelmann, EMC Bob Haller, Digital Equipment Bruce Heilbrunn, Stratus Peter LaFlamme, Fairchild Harvey Stiegler, Texas Instruments Mike Ward, Fairchild We welcomed three new members to the IBIS Accuracy Sub-Committee at our second meeting. Harvey Stiegler, who works for TI's memory division, flew up from Houston to join us. Peter LaFlamme and Mike Ward, both from Fairchild, drove down from Portland, Maine. We now have a well-rounded group with representatives from the semiconductor, EDA, and system industries. Agenda The agenda for the meeting was to draft a BIRD (Buffer Issue Resolution Document) proposing an IBIS Accuracy Specification. There was much discussion, but after all was said nothing was done. It has been suggested that we not attempt accomplish any writing during these meetings but rather assign parts of the specification to each member as homework and focus on discussion and decision making during the meetings. Greg Edlund will be drafting the BIRD and sending it electronically to each member for input before we submit it to the IBIS Committee. This first BIRD will be short and sweet, stating the intentions of the IBIS Accuracy Specification and some rough content related to implementation. Discussion Bruce Heilbrunn argued that the IBIS Accuracy Specification ought to encompass the entire IBIS 3.0 specification. There was some confusion among others in the group over what new features are available in IBIS 3.0 and what their implications might be regarding accuracy. Greg Edlund argued that at the very least some of these new features might require a wider variety of test loads to cover the circuit behavior they represent. The committee decided to table the question of IBIS 3.0 coverage until we all have the chance to become more familiar with the new revision. There was considerable discussion about whether or not our committee needs to address the question of discrepancies between simulation engines. We all realize the political sensitivity of this issue. It would be prudent and expedient for the work of the committee to steer away from this question as much as possible. One would imagine that at the most fundamental level, say IBIS 1.1, all simulators must give the same answer for a simple push-pull output buffer. It would behoove us to keep things as simple as possible until we establish a solid foundation. The question becomes, at what level do we begin to encounter differences between simulation engines. Kumar's presentation at the IBIS Summit leads us to believe that features introduced in IBIS 2.1, namely VT curves, bring out these differences. Mike Ward highlighted the need to include in the IBIS Accuracy Specification material related to data-taking techniques. This material would include topics such as accounting for probe parasitics, scope bandwidth, junction temperature, etc. We went on to talk about which of these items should be specified and which might be considered "cookbook" material. This will become more clear when we release the BIRD. Test Board Greg Edlund, Fawn Engelmann, and Bob Haller worked on powering up the test board. Even though some of the footprints were wrong, Fawn's remarkable EC wiring resulting in verification of the board's functionality. We will be changing the footprints and making some other minor changes to accommodate a 16821 part so that other vendors participate in testing. There has been great interest in this little board. When we are done, we intend to publish the schematics, Gerber files, parts list, and test plan on the IBIS web page for all to use. Next meeting: Thursday, March 26 (location TBD) Homework Assignments Greg Edlund - draft BIRD and circulate Fawn Engelmann - turn test board layout Peter LaFlamme - report on IBIS keywords that are relevant to accuracy Bob Haller - begin writing the section on data-taking techniques Bruce Heilbrunn - contact simulation vendors about releasing a developer's tool kit ---------- Greg Edlund, Principal Engineer Server Product Development Digital Equipment Corp. 129 Parker St. PKO3-1/20C Maynard, MA 01754 (978) 493-4157 voice (978) 493-0941 FAX greg.edlund@digital.com From owner-ibis Tue Mar 10 10:43:28 1998 Received: from gatekeeper.ssi1.com (root@gatekeeper.ssi1.com [208.210.218.18]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id KAA27177 for ; Tue, 10 Mar 1998 10:43:27 -0800 (PST) From: Alvin_Cheung@notes.ssi1.com Received: from hp427u.tus.ssi1.com (hp427u.tus.ssi1.com [146.252.25.27]) by gatekeeper.ssi1.com (8.8.5/8.8.5) with ESMTP id KAA15999 for ; Tue, 10 Mar 1998 10:40:42 -0800 (PST) Received: from su510u.tus.ssi1.com (su510u.tus.ssi1.com [146.252.24.38]) by hp427u.tus.ssi1.com (8.6.12/8.6.12) with SMTP id KAA13666 for ; Tue, 10 Mar 1998 10:36:21 -0800 Received: by su510u.tus.ssi1.com(Lotus SMTP MTA SMTP v4.6 (462.2 9-3-1997)) id 882565C3.00669916 ; Tue, 10 Mar 1998 10:40:38 -0800 X-Lotus-FromDomain: SSI1 To: ibis-users@eda.org Message-ID: <882565C3.0064DDE0.00@su510u.tus.ssi1.com> Date: Tue, 10 Mar 1998 10:40:30 -0800 Subject: IBIS creation for input buffer Mime-Version: 1.0 Content-type: text/plain; charset=us-ascii Hi, I would like to know if I did my ibis model correctly as it should be. I have an input buffer and I used S2IBIS2 to develop my IBIS model. However, it seems like that the S2IBIS is sweeping the input and measure the current going into the input at the same time. My concern is that should the measurement be taken at the output of the input buffer as oppose to the input. Thank you in advance if anyone can answer my question. From owner-ibis Wed Mar 11 09:16:59 1998 Received: from wile.nesa.com ([204.240.29.30]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id JAA18556 for ; Wed, 11 Mar 1998 09:16:57 -0800 (PST) Received: from porky.nesa.com(204.240.29.45) by wile.nesa.com via smap (V1.3) id sma014413; Wed Mar 11 09:33:53 1998 Message-Id: <3.0.3.32.19980311093352.007797a8@mail.nesa.com> X-Sender: breda@mail.nesa.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.3 (32) Date: Wed, 11 Mar 1998 09:33:52 -0500 To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org From: Kathy Breda Subject: IBIS User Group Meeting Reminder - Thurs., 3/19/98, 3:00 PM Mime-Version: 1.0 Content-Type: text/enriched; charset="us-ascii" ****IBIS USER Meeting Reminder**** Date: Thursday, March 19, 1998 Time: 3:00 PM Location: Digital Equipment Corp., Hudson, MA Customer Conf. Center, D309, HLO2/third floor. Final Agenda to follow shortly. I'm looking for more input on what people would like to discuss at the upcoming meeting so please send me e-mail with your ideas (breda@nesa.com). Current Agenda Items Includes: 1) Review of BIRD titled "IBIS Accuracy Specification" submitted by Accuracy Sub-Committee (Greg Edlund) 2) IBIS training and Documentation (Paul Galloway) 2) Update on European IBIS Summit (Paul Galloway) 3) Review proposed content of IBIS User's WEB page (Kathy Breda) Directions to Meeting: Location: Customer Conf. Center, D309, HLO2/third floor. 77 Reed Road, Hudson, MA 01749-2895. Contact: Ask for Jeff Chu at the HLO2 main lobby. Phone numbers: Jeff's office, (978)568-4197 At the conference center, (978)568-6228. >From Route 495 Exit 25A Drive through two traffic lights, and up a hill to the Digital sign. The first light is Fitchburg St, at 1.3 miles. The second light is Route 85, at 1.7 miles. The Digital sign is at 2.3 miles. Turn left into the Digital driveway, and follow it to the left. Turn right at "Employee Entrance, HLO-1," or at "Visitor's Entrance, Helipad, HLO-2," and park. >From the South Take 495 North to exit 25A (labelled "To 85, Hudson"). The exit actually puts you on an access road, not onto Route 85. Follow the directions for getting to HLO from 495 exit 25A: >From the North Take 495 South to exit 25A, (labelled "To 85, Marlboro"). Follow the directions above for getting to HLO from 495 exit 25A. >From Logan International Airport Travel time is a little over one hour. While leaving Logan, follow the signs for the Sumner Tunnel. After the toll booth, try to stay in the right lane to enter the tunnel. After the tunnel, follow signs for Route 93/Expressway South. You will have to bear right 90 degrees after the tunnel, then bear left crossing beneath the Expressway before joining the Expressway. Follow the Expressway South about 1 mile, staying in the right lane. Exit onto the Mass Pike (Route 90) West. >From Boston Travel time is about one hour. Take Route 90 West to Exit 11A (labelled "495 North, Westboro"). Route 90 is the Massachusetts Turnpike, and is often labelled "Mass Pike". There will be tolls totalling $.70 or $1.60, depending on where you get on the Pike. Travel time from Boston to Exit 11 is about 45 minutes. Follow the directions for coming from the south: From owner-ibis Wed Mar 11 09:42:53 1998 Received: from ns1.seagate.com (ns1.seagate.com [204.160.183.10]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id JAA18916 for ; Wed, 11 Mar 1998 09:42:52 -0800 (PST) From: Vanessa_D_Howard@notes.seagate.com Received: (from smap) by ns1.seagate.com id JAA11417 for ; Wed, 11 Mar 1998 09:39:28 -0800 Received: from unknown(134.204.114.75) by ns1.seagate.com via smap (V1.3) id smad11335; Wed Mar 11 17:38:45 1998 Received: from sv-gw1.stsv.seagate.com (sv-gw1.stsv.seagate.com [134.204.14.95]) by auth1.seagate.com with SMTP id JAA08394 for ; Wed, 11 Mar 1998 09:13:14 -0800 Received: by sv-gw1.stsv.seagate.com(Lotus SMTP MTA SMTP v4.6 (462.2 9-3-1997)) id 882565C4.005E96AE ; Wed, 11 Mar 1998 09:13:09 -0800 X-Lotus-FromDomain: SEAGATE@INTERNET To: ibis-users@eda.org Message-ID: <862565C4.005DE464.00@sv-gw1.stsv.seagate.com> Date: Wed, 11 Mar 1998 11:06:28 -0600 Mime-Version: 1.0 Content-type: text/plain; charset=us-ascii Join IBIS User's Group Reflector From owner-ibis Thu Mar 12 08:19:16 1998 Received: from mail.iol.ie (mail1.mail.iol.ie [194.125.2.192]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id IAA09971 for ; Thu, 12 Mar 1998 08:19:08 -0800 (PST) Received: from cmemory.ie ([194.125.127.225]) by mail.iol.ie Sendmail (v8.8.8) with SMTP id QAA21173 for ; Thu, 12 Mar 1998 16:15:56 GMT Message-Id: <199803121615.QAA21173@mail.iol.ie> Date: Thu, 12 Mar 98 15:25:53 +0000 From: "Owen Power" Subject: JEDEC STANDARDS Sender: "Owen Power" To: "'ibis-users@vhdl.org'" MIME-Version: 1.0 Hello ibis people does anybody know where I can get information on JEDEC standards in relation to memory modules, especially SDRAM modules. Regards Owen Power From owner-ibis Thu Mar 12 10:23:28 1998 Received: from gatekeeper.ssi1.com (root@gatekeeper.ssi1.com [208.210.218.18]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id KAA11941 for ; Thu, 12 Mar 1998 10:23:27 -0800 (PST) From: Alvin_Cheung@notes.ssi1.com Received: from hp427u.tus.ssi1.com (hp427u.tus.ssi1.com [146.252.25.27]) by gatekeeper.ssi1.com (8.8.5/8.8.5) with ESMTP id KAA20892 for ; Thu, 12 Mar 1998 10:20:37 -0800 (PST) Received: from su510u.tus.ssi1.com (su510u.tus.ssi1.com [146.252.24.38]) by hp427u.tus.ssi1.com (8.6.12/8.6.12) with SMTP id KAA07822 for ; Thu, 12 Mar 1998 10:16:11 -0800 Received: by su510u.tus.ssi1.com(Lotus SMTP MTA SMTP v4.6 (462.2 9-3-1997)) id 882565C5.0064BEC8 ; Thu, 12 Mar 1998 10:20:24 -0800 X-Lotus-FromDomain: SSI1 To: ibis-users@eda.org Message-ID: <882565C5.00645CD1.00@su510u.tus.ssi1.com> Date: Thu, 12 Mar 1998 10:20:18 -0800 Subject: IBIS creation for Differential Pins Mime-Version: 1.0 Content-type: text/plain; charset=us-ascii Hi, I have a question about sweeping Differential pins. Do you sweep one pin at a time or both at the same time? From owner-ibis Thu Mar 12 10:27:58 1998 Received: from beghera.dataram.com ([206.243.9.140]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id KAA12063 for ; Thu, 12 Mar 1998 10:27:57 -0800 (PST) From: pmuck@maillink.dataram.com Received: from maillink.dataram.com ([194.9.200.12]) by beghera.dataram.com (Netscape Mail Server v1.1) with SMTP id AAA13314; Thu, 12 Mar 1998 13:19:16 -0400 Received: from ccMail by maillink.dataram.com (ccMail Link to SMTP R6.00.02) id AA889726897; Thu, 12 Mar 98 13:21:38 -0500 Message-Id: <9803128897.AA889726897@maillink.dataram.com> X-Mailer: ccMail Link to SMTP R6.00.02 Date: Thu, 12 Mar 98 13:25:55 -0500 To: , Subject: Re: JEDEC STANDARDS MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Jedec has a WEB site (www.eia.org.jedec) were you should be able to find standards on SDRAM and SDRAM modules. The two Jecec committes you will be interested in are JC42.3 and JC42.5. Regards Phil Muck Dataram Corp. ______________________________ Reply Separator _________________________________ Subject: JEDEC STANDARDS Author: "Owen Power" at Internet Date: 3/12/98 3:25 PM Hello ibis people does anybody know where I can get information on JEDEC standards in relation to memory modules, especially SDRAM modules. Regards Owen Power From owner-ibis Thu Mar 12 12:48:21 1998 Received: from gatekeeper2.nsc.com (natsemi3-bh.nsc.com [205.227.60.66]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id MAA14156 for ; Thu, 12 Mar 1998 12:48:21 -0800 (PST) Received: (from uucp@localhost) by gatekeeper2.nsc.com (8.6.12/8.6.11) id MAA05776; Thu, 12 Mar 1998 12:45:33 -0800 Received: from nsc.nsc.com by natsemi3-bh.nsc.com via smap (3.2) id xma005745; Thu, 12 Mar 98 12:45:31 -0800 Received: from lightning2.nsc.com by nsc.nsc.com (5.65/1.34) with SMTP id AA15168 for ibis-users@eda.org; Thu, 12 Mar 98 12:45:30 -0800 Received: from kural by rockie.nsc.com (4.1/SMI-4.1) id AA26451; Thu, 12 Mar 98 12:47:48 PST Date: Thu, 12 Mar 98 12:47:48 PST From: huq@rockie.nsc.com (Syed Huq) Message-Id: <9803122047.AA26451@rockie.nsc.com> To: ibis-users@eda.org, Alvin_Cheung@notes.ssi1.com Subject: Re: IBIS creation for Differential Pins Hi, You can only provide the V/I or Ramp(or V/T) data for one pin at a time for IBISv2.1. So the answer is, you would sweep one pin at a time. Regards, Syed. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~ Syed B. Huq huq@rockie.nsc.com ~ ~ Interface Apps Engineer ~ ~ National Semiconductor Corp. ~ ~ Tel:(408)721-4874; Fax:(408)721-4785 ~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > From owner-ibis@server.vhdl.org Thu Mar 12 11:27:58 1998 > From: Alvin_Cheung@notes.ssi1.com > X-Lotus-Fromdomain: SSI1 > To: ibis-users@eda.org > Date: Thu, 12 Mar 1998 10:20:18 -0800 > Subject: IBIS creation for Differential Pins > Content-Type> : > text/plain> ; > charset=us-ascii> > > Hi, I have a question about sweeping Differential pins. Do you sweep one > pin at a time or both at the same time? > > > From owner-ibis Thu Mar 12 14:11:03 1998 Received: from gatekeep.ti.com (gatekeep.ti.com [192.94.94.61]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id OAA15453 for ; Thu, 12 Mar 1998 14:11:02 -0800 (PST) Received: from sh-gpl.ti.com ([158.218.236.9]) by gatekeep.ti.com (8.8.8) with ESMTP id QAA13171; Thu, 12 Mar 1998 16:07:42 -0600 (CST) Received: from LT0458961.shvp.sc.ti.com (lt0458961.shvp.sc.ti.com [158.218.234.196]) by sh-gpl.ti.com (8.8.5/8.7.3) with SMTP id QAA10988; Thu, 12 Mar 1998 16:07:40 -0600 (CST) Message-Id: <2.2.32.19980312220740.00b5a018@popper.sh-gpl.ti.com> X-Sender: adam@popper.sh-gpl.ti.com X-Mailer: Windows Eudora Pro Version 2.2 (32) Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Date: Thu, 12 Mar 1998 16:07:40 -0600 To: From: "Adam W. Ley" Subject: Re: JEDEC STANDARDS Cc: Owen, I think the specific URL which is relevant is as follows: http://www.eia.org/jedec/download/freestd/pub21/ Hope it helps!! Best Regards, Adam At 01:25 PM 98/03/12 -0500, pmuck@maillink.dataram.com wrote: > > Jedec has a WEB site (www.eia.org.jedec) were you should be able to > find standards on SDRAM and SDRAM modules. The two Jecec committes > you will be interested in are JC42.3 and JC42.5. > > > Regards > Phil Muck > Dataram Corp. > > > >______________________________ Reply Separator _________________________________ >Subject: JEDEC STANDARDS >Author: "Owen Power" at Internet >Date: 3/12/98 3:25 PM > > >Hello ibis people > does anybody know where I can get information on JEDEC standards >in relation to memory modules, especially SDRAM modules. > > Regards Owen Power > > > > > > > > Texas Instruments Incorporated (see us at http://www.ti.com)........ ! Adam W. Ley, Senior Member Technical Staff ! ! Texas Instruments, Standard Linear & Logic ! ! Product Marketing/Application Support ! ! US mail: M/S 835; PO Box 84; Sherman, TX 75091-0084 ! ! shipping: M/S 835; 6412 Hwy 75 S; Sherman, TX 75090-0084 ! ! phone: 903-868-5761; fax: 903-868-5980 ! ! TI msgid: ALEY; internet mail: aley@ti.com ! ! ** BSDL on WWW at: http://www.ti.com/sc/docs/jtag/silicon.htm ** ! .......................................Texas Instruments Incorporated From owner-ibis Thu Mar 12 14:58:25 1998 Received: from palrel3.hp.com (palrel3.hp.com [156.153.255.226]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id OAA16213 for ; Thu, 12 Mar 1998 14:58:25 -0800 (PST) From: PRASAD_VENUGOPAL@HP-SanJose-om1.om.hp.com Received: from hpbs4857.boi.hp.com (hpbs4857.boi.hp.com [15.56.8.29]) by palrel3.hp.com (8.8.5/8.8.5tis) with ESMTP id OAA08474 for ; Thu, 12 Mar 1998 14:55:38 -0800 (PST) Received: from localhost (root@localhost) by hpbs4857.boi.hp.com with SMTP (8.7.1/8.7.3 TIS 5.0 Openmail) id OAA16426 for ibis-users@vhdl.org; Thu, 12 Mar 1998 14:55:37 -0800 (PST) X-OpenMail-Hops: 1 Date: Thu, 12 Mar 1998 14:55:28 -0800 Message-Id: Subject: ECL and Differential Output IBIS models MIME-Version: 1.0 TO: ibis-users@vhdl.org Content-Type: text/plain; charset=US-ASCII; name="cc:Mail" Content-Disposition: inline; filename="cc:Mail" Content-Transfer-Encoding: 7bit Hi, IBIS users. Can you direct me to publicly available models for an Output_ECL and Differential Output IBIS models on the web? Thanks. From owner-ibis Thu Mar 12 17:37:56 1998 Received: from gatekeeper2.nsc.com (natsemi3-bh.nsc.com [205.227.60.66]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id RAA18651 for ; Thu, 12 Mar 1998 17:37:56 -0800 (PST) Received: (from uucp@localhost) by gatekeeper2.nsc.com (8.6.12/8.6.11) id RAA07572; Thu, 12 Mar 1998 17:28:52 -0800 Received: from nsc.nsc.com by natsemi3-bh.nsc.com via smap (3.2) id xma007420; Thu, 12 Mar 98 17:28:34 -0800 Received: from lightning2.nsc.com by nsc.nsc.com (5.65/1.34) with SMTP id AA08956 for ibis-users@vhdl.org; Thu, 12 Mar 98 17:28:33 -0800 Received: from kural by rockie.nsc.com (4.1/SMI-4.1) id AA04064; Thu, 12 Mar 98 17:30:52 PST Date: Thu, 12 Mar 98 17:30:52 PST From: huq@rockie.nsc.com (Syed Huq) Message-Id: <9803130130.AA04064@rockie.nsc.com> To: ibis-users@vhdl.org, PRASAD_VENUGOPAL@hp-sanjose-om1.om.hp.com Subject: Re: ECL and Differential Output IBIS models Hi, National Semiconductor provides Differential IBIS models: Check http://www.national.com/models Click on 'IBIS' and then select the product line 'Interface' ALL the models under this Interface Products Group are Diff I/O. Regards, Syed. ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ ~ Syed B. Huq huq@rockie.nsc.com ~ ~ Interface Apps Engineer ~ ~ National Semiconductor Corp. ~ ~ Tel:(408)721-4874; Fax:(408)721-4785 ~ ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > From owner-ibis@server.vhdl.org Thu Mar 12 16:09:43 1998 > From: PRASAD_VENUGOPAL@HP-SanJose-om1.om.hp.com > X-Openmail-Hops: 1 > Date: Thu, 12 Mar 1998 14:55:28 -0800 > Subject: ECL and Differential Output IBIS models > To: ibis-users@vhdl.org > Content-Type> : > text/plain> ; > charset=US-ASCII> ; > name="cc:Mail"> > Content-Disposition: inline; filename="cc:Mail" > Content-Transfer-Encoding: 7bit > > > Hi, IBIS users. > > Can you direct me to publicly available models for an Output_ECL and > Differential Output IBIS models on the web? > > Thanks. > > From owner-ibis Thu Mar 12 18:16:19 1998 Received: from mailer.via.com.tw ([202.145.217.165]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id SAA19125 for ; Thu, 12 Mar 1998 18:16:16 -0800 (PST) Received: from Ming.via.com.tw ([192.168.100.167]) by mailer.via.com.tw (Netscape Mail Server v1.1) with SMTP id AAA251 for ; Fri, 13 Mar 1998 10:14:37 +0800 Message-ID: <3508966E.444A@via.com.tw> Date: Fri, 13 Mar 1998 10:14:06 +0800 From: Ming_Yeung@mailer.via.com.tw (Yeung, Ming) Reply-To: Ming_Yeung@via.com.tw Organization: via X-Mailer: Mozilla 3.0Gold (Win95; I) MIME-Version: 1.0 To: ibis-users@vhdl.org Subject: For subscribtion From owner-ibis Fri Mar 13 18:34:16 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id SAA11939; Fri, 13 Mar 1998 18:34:15 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id SAA17508; Fri, 13 Mar 1998 18:30:57 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.7.5/CF5.38R) id SAA25785; Fri, 13 Mar 1998 18:30:54 -0800 (PST) From: bobr@wv.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA04866; Fri, 13 Mar 98 18:31:26 PST Date: Fri, 13 Mar 98 18:31:26 PST Message-Id: <9803140231.AA04866@bob> To: ibis-users@eda.org, ibis@eda.org Subject: New s2ibis2 executable for Win95. To All: This is to inform you that a Windows95 version of s2ibis2 has been uploaded to eda.org under /pub/ibis/s2ibis/s2ibis2_nt/s2ibis2Win95.zip. It works with HSPICE. This is contributed by Scott McMorrow of SiQual corporation. It contains some fixes including using 5 decimal digits in the tables for better resolution and also providing 251 points in the Waveform tables. A utility is provided to filter these points to 100 by taking the first 75 points and sampling the rest. In this way there is high resolution for the first part of the response where the rapid transitions should occur and also enough points to capture the convergence to the final DC value. Scott's email address and other information is contained in the .zip file if you have comments or questions. Thanks to Scott for contributing this. Bob Ross Interconnectix Business Unit/Mentor Graphics From owner-ibis Fri Mar 13 23:06:13 1998 Received: from belpak.belpak.minsk.by (belpak.minsk.by [193.232.248.10]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id XAA15649 for ; Fri, 13 Mar 1998 23:06:10 -0800 (PST) Received: from rbp by belpak.belpak.minsk.by id aa23516; 14 Mar 98 9:04 EET Received: by rbp.belpak.minsk.by (dMail for DOS v2.05b2, 20Mar97); Sat, 14 Mar 1998 09:02:21 +0200 To: ibis-users@eda.org Message-Id: Organization: RusBelPribor From: "Alexandr Sidorov" Date: Sat, 14 Mar 1998 09:02:21 +0200 (GMT) X-Mailer: dMail [Demos Mail for DOS v2.05b2] Subject: looking for friends Lines: 14 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Hi, IBIS Users ! I'm a PCB designer and work with Mentor Graphics Board Station 500. At last time I have many questions about IBIS and Quad Design modelling issues, hi-speed problems and so on. But I live in Belarus, where only few people interesting this questions. One proposition - please, write to me all, who also have some questions. Espesially from Europe (Russia, Poland, France, ...). You may leave only youth e-mail address. Best regards, -- Alexander Sidorov (shura@rbp.belpak.minsk.by) Rusbelpribor Minsk Belarus From owner-ibis Fri Mar 13 23:06:13 1998 Received: from belpak.belpak.minsk.by (belpak.minsk.by [193.232.248.10]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id XAA15650 for ; Fri, 13 Mar 1998 23:06:10 -0800 (PST) Received: from rbp by belpak.belpak.minsk.by id aa23511; 14 Mar 98 9:04 EET Received: by rbp.belpak.minsk.by (dMail for DOS v2.05b2, 20Mar97); Fri, 13 Mar 1998 13:30:27 +0200 To: ibis-users@eda.org Message-Id: Organization: RusBelPribor From: "Alexandr Sidorov" Date: Fri, 13 Mar 1998 13:30:27 +0200 (GMT) X-Mailer: dMail [Demos Mail for DOS v2.05b2] Subject: looking for friends Lines: 13 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Hi, IBIS Users ! I'm a PCB designer and work with Mentor Graphics Board Station 500. At last time I have many questions about IBIS and Quad Design modelling issues, hi-speed problems and so on. But I live in Belarus, where only few people interesting this questions. One proposition - please, write to me all, who also have some questions. Espesially from Europe (Russia, Poland, France, ...). You may leave only youth e-mail address. Best regards, -- Alexander Sidorov (shura@rbp.belpak.minsk.by) Rusbelpribor Minsk Belarus From owner-ibis Fri Mar 13 23:06:13 1998 Received: from belpak.belpak.minsk.by (belpak.minsk.by [193.232.248.10]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id XAA15648 for ; Fri, 13 Mar 1998 23:06:10 -0800 (PST) Received: from rbp by belpak.belpak.minsk.by id aa23505; 14 Mar 98 9:04 EET Received: by rbp.belpak.minsk.by (dMail for DOS v2.05b2, 20Mar97); Fri, 13 Mar 1998 11:59:34 +0200 To: ibis-users@eda.org Message-Id: Organization: RusBelPribor From: "Alexandr Sidorov" Date: Fri, 13 Mar 1998 11:59:34 +0200 (GMT) X-Mailer: dMail [Demos Mail for DOS v2.05b2] Subject: looking for friends Lines: 14 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Hi, IBIS Users ! I'm a PCB designer and work with Mentor Graphics Board Station 500. At last time I have many questions about IBIS and Quad Design modelling issues, hi-speed problems and so on. But I live in Belarus, where only few people interesting this questions. One proposition - please, write to me all, who also have some questions. Espesially from Europe (Russia, Poland, France, ...). You may leave only youth e-mail address. Best regards, -- Alexander Sidorov (shura@rbp.belpak.minsk.by) Rusbelpribor Minsk Belarus From owner-ibis Sun Mar 15 21:44:03 1998 Received: from morse.cri.tatung.com.tw ([139.223.28.160]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id VAA28630 for ; Sun, 15 Mar 1998 21:44:02 -0800 (PST) Received: by morse.cri.tatung.com.tw with Internet Mail Service (5.0.1458.49) id ; Mon, 16 Mar 1998 13:39:00 +0800 Message-ID: <039D0B78FF5FD111876E0000F87510900467@morse.cri.tatung.com.tw> From: =?Big5?B?p2SpdsBN?= To: ibis-users@vhdl.org Subject: Level=45 in s2ibis by the Hspice simulator.. Date: Mon, 16 Mar 1998 13:38:59 +0800 X-Priority: 3 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.0.1458.49) Content-Type: text/plain Hi, I have a Hspice circuit with the processing data file with Level=45. When I use the s2ibis2 to transfer this Hspice file to IBIS models, the Hspice (Ver96.3) simulator give me following error messages, lic: USER: cri HOSTNAME: pisces HOSTID: 72f403d9 lic: contacting server: quest.ttit.edu.tw lic: Server permit path: /usr/meta/cur/permit.hsp lic: Site: cic_ta_tung Created: 970723 Order#: 86833 lic: token number 2166 allocated_SJF lic: contacting server: quest.ttit.edu.tw lic: Server permit path: /usr/meta/cur/permit.hsp lic: Site: cic_ta_tung Created: 970723 Order#: 86833 lic: request denied lic: Cannot find a permit file to read lic: use "metalicense -a" to check current use of tokens lic: use "metastat -l" to see list of available tokens lic: contacting server: quest.ttit.edu.tw lic: Server permit path: /usr/meta/cur/permit.hsp lic: Site: cic_ta_tung Created: 970723 Order#: 86833 lic: request denied lic: Cannot find a permit file to read lic: use "metalicense -a" to check current use of tokens lic: use "metastat -l" to see list of available tokens lic: Releasing license for hspice Anyone who is familiar S2ibis2 and Hspice please give me some advice how to solve that. Thanks Best Regards, T.L Wu From owner-ibis Mon Mar 16 00:06:12 1998 Received: from exchange2.via.com.tw ([202.145.217.249]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id AAA01219 for ; Mon, 16 Mar 1998 00:06:09 -0800 (PST) Received: by exchange2.via.com.tw with Internet Mail Service (5.5.1960.3) id ; Mon, 16 Mar 1998 16:03:38 +0800 Message-ID: <4399E411E49ED111973000A0C92BD8A00257B3@exchange2.via.com.tw> From: Weber Chuang To: =?Big5?B?J6dkqXbATSc=?= Cc: ibis-users@vhdl.org Subject: Re: Level=45 in s2ibis by the Hspice simulator.. Date: Mon, 16 Mar 1998 16:03:31 +0800 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.1960.3) Content-Type: text/plain; charset="Big5" Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by server.vhdl.org id AAA01220 Hi , (1)You need to make sure that the host you are running on can access hspice smoothly. (2)You need to make sure that in the *.s2i file, correct version and type of spice is identified. It looks like licensing issue, not s2ibis issue. Maybe I am wrong but tell me the result, please. Best Regards Weber Chuang(ChingFu Chuang 莊景涪) SI Engineer, System Team. VIA Technologies, Inc. Taipei, Taiwan, ROC http://www.via.com.tw Very Innovative Architecture > -----原始郵件----- > 寄件者: 吳宗霖 [SMTP:wtl@cri.tatung.com.tw] > 傳送時間: 1998年3月16日 下午 01:39 > 收件者: ibis-users@vhdl.org > 主旨: Level=45 in s2ibis by the Hspice simulator.. > > Hi, > > I have a Hspice circuit with the processing data file with Level=45. > When I use the s2ibis2 to transfer this Hspice file to > IBIS models, the Hspice (Ver96.3) simulator give me following error > messages, > > > lic: USER: cri HOSTNAME: pisces HOSTID: 72f403d9 > lic: contacting server: quest.ttit.edu.tw > lic: Server permit path: /usr/meta/cur/permit.hsp > lic: Site: cic_ta_tung Created: 970723 Order#: 86833 > lic: token number 2166 allocated_SJF > lic: contacting server: quest.ttit.edu.tw > lic: Server permit path: /usr/meta/cur/permit.hsp > lic: Site: cic_ta_tung Created: 970723 Order#: 86833 > lic: request denied > lic: Cannot find a permit file to read > lic: use "metalicense -a" to check current use of tokens > lic: use "metastat -l" to see list of available tokens > lic: contacting server: quest.ttit.edu.tw > lic: Server permit path: /usr/meta/cur/permit.hsp > lic: Site: cic_ta_tung Created: 970723 Order#: 86833 > lic: request denied > lic: Cannot find a permit file to read > lic: use "metalicense -a" to check current use of tokens > lic: use "metastat -l" to see list of available tokens > lic: Releasing license for hspice > > > > Anyone who is familiar S2ibis2 and Hspice please give me some advice > how > to solve that. > > Thanks > > Best Regards, > T.L Wu From owner-ibis Mon Mar 16 00:25:31 1998 Received: from morse.cri.tatung.com.tw (cri.tatung.com.tw [139.223.28.160]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id AAA01563 for ; Mon, 16 Mar 1998 00:25:29 -0800 (PST) Received: by morse.cri.tatung.com.tw with Internet Mail Service (5.0.1458.49) id ; Mon, 16 Mar 1998 16:20:31 +0800 Message-ID: <039D0B78FF5FD111876E0000F87510900468@morse.cri.tatung.com.tw> From: =?Big5?B?p2SpdsBN?= To: ibis-users@eda.org Subject: Level = 45 Hspice circuit problem when transferring to IBIS model s Date: Mon, 16 Mar 1998 16:20:30 +0800 X-Priority: 3 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.0.1458.49) Content-Type: text/plain Hi, I have a Hspice circuit with the processing data file with Level = 45 processing parameters. When I use the s2ibis2 to transfer this Hspice file to IBIS models, the Hspice (Ver96.3) simulator give me following error messages, lic: USER: cri HOSTNAME: pisces HOSTID: 72f403d9 lic: contacting server: quest.ttit.edu.tw lic: Server permit path: /usr/meta/cur/permit.hsp lic: Site: cic_ta_tung Created: 970723 Order#: 86833 lic: token number 2166 allocated_SJF lic: contacting server: quest.ttit.edu.tw lic: Server permit path: /usr/meta/cur/permit.hsp lic: Site: cic_ta_tung Created: 970723 Order#: 86833 lic: request denied lic: Cannot find a permit file to read lic: use "metalicense -a" to check current use of tokens lic: use "metastat -l" to see list of available tokens lic: contacting server: quest.ttit.edu.tw lic: Server permit path: /usr/meta/cur/permit.hsp lic: Site: cic_ta_tung Created: 970723 Order#: 86833 lic: request denied lic: Cannot find a permit file to read lic: use "metalicense -a" to check current use of tokens lic: use "metastat -l" to see list of available tokens lic: Releasing license for hspice Anyone who is familiar s2ibis2 and Hspice please give me some advice how to solve that. Thanks Best Regards, T.L Wu From owner-ibis Mon Mar 16 17:28:30 1998 Received: from morse.cri.tatung.com.tw (www.cri.tatung.com.tw [139.223.28.160]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id RAA21250 for ; Mon, 16 Mar 1998 17:28:29 -0800 (PST) Received: by morse.cri.tatung.com.tw with Internet Mail Service (5.0.1458.49) id ; Tue, 17 Mar 1998 09:23:30 +0800 Message-ID: <039D0B78FF5FD111876E0000F87510900469@morse.cri.tatung.com.tw> From: =?Big5?B?p2SpdsBN?= To: ibis-users@eda.org Subject: Level=45 in s2ibis by the Hspice simulator.. Date: Tue, 17 Mar 1998 09:23:29 +0800 X-Priority: 3 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.0.1458.49) Content-Type: text/plain Hi, Thanks for your response. I have checked the license of our Hspice with Version 96.3. It is no problem. Then I check the user manual of Hspice and find that this Hspice version does not support the Level = 45 processing parameters which my Hspice circuit uses. It support Level = 41, 47, but not 45. I think it is the reason that I can not run s2ibis2 smoothly. SO, I have another QUESTION: Which version of Hspice will support LEVEL = 45 processing datas? OR, Is it a special circuit that needs special license? T.L. Wu From owner-ibis Mon Mar 16 22:46:41 1998 Received: from galileo5.galileo.co.il ([192.116.246.22]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id WAA26602 for ; Mon, 16 Mar 1998 22:46:38 -0800 (PST) Received: from galileo.co.il (galileo24.galileo.co.il [192.116.246.197]) by galileo.co.il (8.8.5/8.8.5) with ESMTP id IAA13419; Tue, 17 Mar 1998 08:43:40 +0300 (GMT-3) Sender: dan@galileo.co.il Message-ID: <350E0D8B.53F59F71@galileo.co.il> Date: Tue, 17 Mar 1998 08:43:39 +0300 From: Dan Alexandrovich Organization: GALILEO Technology Ltd. X-Mailer: Mozilla 4.02 [en] (X11; I; SunOS 5.5.1 sun4u) MIME-Version: 1.0 To: "吳宗霖" CC: "ibis-users@eda.org" Subject: Re: Level=45 in s2ibis by the Hspice simulator.. References: <039D0B78FF5FD111876E0000F87510900469@morse.cri.tatung.com.tw> Content-Type: multipart/alternative; boundary="------------56D43519BBF2CAFE8DA292F6" --------------56D43519BBF2CAFE8DA292F6 Content-Type: text/plain; charset=iso-8859-1 Content-Transfer-Encoding: 8bit Hi Wu. Your problem is a simple one that can be solved easily by contacting both Avant! and the company the supplied the Hspice file. You require the permition / licence to use a transistor level 45. that can be arranged be getting a written authorization from the company that the Level 45 gate is her IP. And then by proving to Avant! that you have receive proper authorization. But, if you are using a non-unix ( i.e. PC) version of of Hspice all the above is theoretical. The old 96.3 PC version does not support level 45 gates even with a license, sorry. Have a nice day. 吳宗霖 wrote: > Hi, > > Thanks for your response. > I have checked the license of our Hspice with Version 96.3. It is no > problem. > > Then I check the user manual of Hspice and find that this Hspice version > does not support the > Level = 45 processing parameters which my Hspice circuit uses. It > support Level = 41, 47, but not 45. I think it is the reason that I can > not run s2ibis2 smoothly. > > SO, I have another QUESTION: > > Which version of Hspice will support LEVEL = 45 processing datas? OR, Is > it a special circuit that needs special license? > > T.L. Wu -- _/_/_/_/ _/_/_/_/_/_/ _/_/_/_/_/_/_/_/ Dan Aleksandrowicz _/_/_/_/_/_/_/_/ _/_/_/_/ Galileo Technology _/_/_/ _/_/_/ _/_/_/_/ Email - mail to:dan@galileo.co.il _/_/_/ _/_/_/ Phone (Yahod) - + 972 3 6320220 Ext. 324 _/_/_/ _/_/_/ FAX (Yahod) - + 972 3 6320221 _/_/_/_/_/_/_/_/ _/_/_/_/_/_/ _/_/_/_/ * check out our web site: http://www.GalileoT.com * "Smoke on the water, Fire in the sky" --------------56D43519BBF2CAFE8DA292F6 Content-Type: text/html; charset=us-ascii Content-Transfer-Encoding: 7bit Hi Wu.

Your problem is a simple one that can be solved easily by contacting both Avant!
and the company the supplied the Hspice file.

You require the permition / licence to use a transistor level 45. that can be arranged be
getting a written authorization from the company that the Level 45 gate is her IP.
And then by proving to Avant! that you have receive proper authorization.

But, if you are using a non-unix ( i.e. PC) version of of Hspice all the above is theoretical.
The old 96.3 PC version does not support level 45 gates even with a license, sorry.

Have a nice day.
 
 
 

§d©vÀM wrote:

Hi,

Thanks for your response.
I have checked the license of our Hspice with Version 96.3. It is no
problem.

Then I check the user manual of Hspice and find that this Hspice version
does not support the
Level = 45 processing parameters which my Hspice circuit uses. It
support Level = 41, 47, but not 45. I think it is the reason that I can
not run s2ibis2 smoothly.

SO, I have another QUESTION:

Which version of Hspice will support LEVEL = 45 processing datas? OR, Is
it a special circuit that needs special license?

T.L. Wu

  
-- 
        _/_/_/_/
     _/_/_/_/_/_/
   _/_/_/_/_/_/_/_/    Dan Aleksandrowicz 
   _/_/_/_/_/_/_/_/
  _/_/_/_/                 Galileo Technology
  _/_/_/                    
  _/_/_/    _/_/_/_/   Email -  mail to:dan@galileo.co.il
  _/_/_/      _/_/_/    Phone (Yahod) -  + 972 3 6320220 Ext. 324 
   _/_/_/     _/_/_/    FAX   (Yahod) -  + 972 3 6320221 
   _/_/_/_/_/_/_/_/   
     _/_/_/_/_/_/
       _/_/_/_/
* check out our web site:       http://www.GalileoT.com *
"Smoke on the water, Fire in the sky"
  --------------56D43519BBF2CAFE8DA292F6-- From owner-ibis Tue Mar 17 17:07:24 1998 Received: from mailgate.cadence.com (mailgate.Cadence.COM [158.140.2.1]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id RAA15759 for ; Tue, 17 Mar 1998 17:07:23 -0800 (PST) Received: (from smap@localhost) by mailgate.cadence.com (8.8.5/8.6.8) id RAA17709; Tue, 17 Mar 1998 17:04:33 -0800 (PST) Received: from hi-av2.cadence.com(158.140.128.32) by mailgate.cadence.com via smap (mjr-v1.2) id xma890183071.017698; Tue, 17 Mar 98 17:04:31 -0800 Received: from node2.boston (node2 [158.140.103.70]) by mailhub.Cadence.COM (8.8.5/8.7.3) with SMTP id RAA29989; Tue, 17 Mar 1998 17:04:27 -0800 (PST) Received: from pc-pgjr.cadence.com by node2.boston (SMI-8.6/SMI-SVR4) id TAA18223; Tue, 17 Mar 1998 19:59:59 -0500 Message-Id: <2.2.32.19980318005607.00c8fca8@node2> X-Sender: pgjr@node2 X-Mailer: Windows Eudora Pro Version 2.2 (32) Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Date: Tue, 17 Mar 1998 19:56:07 -0500 To: ibis-users@vhdl.org, fzanella@emc.com, Michael_Mirmak@ccm.fm.intel.com, idodd@ingr.com, haselect@haselect.com, atulapt@giascl01.vsnl.net.in, andrew@scs.ch, bogatin@ansoft.com, jaydiep@us.ibm.com, JABEREN@aol.com, craiglew@node2.cadence.com From: Paul Galloway Subject: Minutes of IBIS User sub-committee on software Cc: pgjr@node2.cadence.com, esayre@nesa.com, breda@nesa.com IBIS Sub-Committee on software and usability Tuesday, March 10, 1998 held at Cadence Design Systems in Chelmsford Attendees: Paul Galloway, Cadence (chair) Fabrizio Zanella, EMC Craig Lewis, Cadence Michael Mirmak, Intel (via phone) Haruny Said, HAS Consulting (via phone) Agenda: The intent of this meeting was to discuss and review progress of the previously identified topics listed below. Purpose to create action items and proceed with development. Topics discussed: - Spice to IBIS and IBIS development utilities - User Group Website - User Education - Connector Models - time for another BIRD Details below: o IBIS software utilities - Two immediate needs have been identified: 1) an enhanced s2ibis to correct issues with the existing s2ibis2 and add s2ibis3 features and 2) an IBIS builder kit that would make it easy for people getting started to build IBIS models. It sounds like the recently announced Hyperlynx "IBIS Developer" suite may cover the requirements for 2). It was decided to proceed with 1) with the goal of creating a robust s2ibis to fix many of the issues of s2ibis2 and add some additional features of IBIS 3.0. To do this we will work with the IBIS Open Forum for guidelines on the following issues: - Capture issues and problems with s2ibis2 and determine what specific features of IBIS 3.0 should be added, basically develop a specification for the new s2ibis. - Proceed with soliciting funding by working with the IBIS Open Forum and soliciting member organizations for development funds and researching available grants, etc. for development. - Locate and schedule software development contractor for code development of the new s2ibis utility. Action Item - Pursue funding through member organizations - Haruny Said Action Item - Research potential availability of grants - Paul Galloway o Web Site - Andrew Philips has volunteered to set up a website for the user forum and has been in discussion with Kathy Breda (NESA) for format of this. Haruny Said also provided some insight as to how to make the website easy to find: - Register with all major search engines - Use key words in html file name, page title, and first line of content Following is the outline they have created: (first page:) Welcome to the IBIS User Forum Web Page... IBIS User Forum News - dates of next meetings... IBIS User Forum Overview IBIS User Meetings Sub-Committee Activities IBIS Tools Useful IBIS related Links On-line Chat footer - mail to breda@nesa.com to be added to distribution list... (and beyond first page:) |----> IBIS User Forum Overview - IBIS User Forum Mission - IBIS User Forum Logistics (need better title) --Who is involved (distribution list - maybe) --meetings --sub-committees and contacts --current projects (link to IBIS User Meetings) - What is IBIS --Description of IBIS --Contacts (i.e. Link to IBIS Forum page) |----> IBIS User Meetings - News Item, announcing next meeting detail for user meeting and sub-committees - Minutes & Agendas -- User Forum --- by date, meeting minutes, agenda for upcoming meeting -- Subcommittees --- Subcommittee on accuracy ---- by date, meeting minutes, agendas --- Subcommittee on software aspects of IBIS ---- by date, meeting minutes, agendas - Presentations -- Presentations from meetings (link back to meetings) --- Abstract with PDF and ZIP availability? -- Other Interesting presentations --- Abstract with PDF and ZIP availability? |----> Sub-committee Activities - Sub-committee on accuracy -- Members -- link to minutes & Agendas -- BIRDS -- Test Board Design --Test board schematics --Test board simulation files -- Other stuff? -- Other? - Sub-committee on Software Aspects.... -- Members -- links to minutes & Agendas -- BIRDS -- Education Topics --? -- Other? o User Education - There was an item from the last User Group meeting as to the need for an IBIS "crash course". Our discussion leads us to the requirement for both a short (1 hour) "what is IBIS?" seminar and an in depth course teaching IBIS model creation (1-2 day). Seminar can most likely be derived from existing material, several people/companies have created and presented "IBIS overview" type materials. Action Item - Follow up with Ed Sayre on development - Paul Galloway o Useability of connector models - The topic of representation of connector models has been an issue and we feel that IBIS should include a defined format for connectors in IBIS 3.1. This had been discussed and shelved before but has become even more of an industry and user issue in the last 1-2 years and needs to be addressed. Action Item - Create (determine existing?) BIRD for connector model - Fabrizio Zanella Cadence Design Systems pgjr@cadence.com (978-262-6231) From owner-ibis Tue Mar 17 23:38:52 1998 Received: from exchange2.via.com.tw ([202.145.217.249]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id XAA21297 for ; Tue, 17 Mar 1998 23:38:49 -0800 (PST) Received: by exchange2.via.com.tw with Internet Mail Service (5.5.1960.3) id ; Wed, 18 Mar 1998 15:36:19 +0800 Message-ID: <4399E411E49ED111973000A0C92BD8A0142234@exchange2.via.com.tw> From: Justin Yu To: "'ibis-users@vhdl.org'" Subject: Subscribe! Date: Wed, 18 Mar 1998 15:36:18 +0800 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.5.1960.3) Content-Type: text/plain Hi, My email address had been changed from justineyu@via.com.tw to justinyu@via.com.tw. Please unsubscribe my old email address and add the new one. Thanks and Regards, Justin ===================================== Have a great day... Justin Yu at VIA Tech. Justinyu@via.com.tw http://www.via.com.tw ===================================== From owner-ibis Wed Mar 18 09:53:32 1998 Received: from wile.nesa.com ([204.240.29.30]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id JAA01934 for ; Wed, 18 Mar 1998 09:53:26 -0800 (PST) Received: from porky.nesa.com(204.240.29.45) by wile.nesa.com via smap (V1.3) id sma002575; Wed Mar 18 10:15:20 1998 Message-Id: <3.0.3.32.19980318101520.00763594@mail.nesa.com> X-Sender: breda@mail.nesa.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.3 (32) Date: Wed, 18 Mar 1998 10:15:20 -0500 To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org From: Kathy Breda Subject: Proposal for an IBIS Accuracy Specification Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" To those interested in IBIS activities: Please review prior to Thursday's (3/19/98 3:00PM) meeting. If you're not attending the meeting, and have comments, please respond to Greg Edlund at Thank You. ++++++++++++++++++++++++++++++++++++++++++++++++++++++ > >Proposal for an IBIS Accuracy Specification > > >REQUESTER: Greg Edlund, Digital Equipment Corp., for the IBIS >Accuracy Sub-Committee > >DATE SUBMITTED: 03/19/98 >DATE REVISED: >DATE ACCEPTED BY IBIS OPEN FORUM: > >************************************************************************ >******* >************************************************************************ >******* > >STATEMENT OF THE ISSUE: > > IBIS users need to know the level of accuracy for the models >they are using. The IBIS models that are available today span a broad >range of accuracy, and a user has no sure way of knowing how well he or >she can expect system hardware to agree with behavioral simulations >based on those models. This situation forces a user to choose between >two undesirable paths: releasing hardware with unknown noise and timing >margins or trying to develop his or her own IBIS models from sparse >data. > >************************************************************************ >******* > >PROPOSED RESOLUTION: > > The IBIS Accuracy Sub-Committee and the IBIS Users Group propose >an IBIS Accuracy Specification. This would take the form of a Word >document that contains appropriate schematics, drawings, and tables. >The IBIS Accuracy Specification is really a document unto itself rather >than an amendment to IBIS since it is in essence different than IBIS. >Therefore, the document you are reading is a proposal rather than a >BIRD. By design the IBIS Accuracy Specification is a definition of a >metric by which to measure accuracy. IBIS itself is a format for >behavioral model parameters. We also expect to produce some material >which is related to implementation but which would be best suited for >inclusion in the IBIS Cookbook. > > The IBIS Accuracy Specification will become a document of >understanding between IBIS model creators and IBIS model users. When a >user calls for an accurate IBIS model in a component purchase >specification, both the user and the semiconductor manufacturer will >know exactly what each other means by accurate. We see semiconductor >manufacturers becoming the primary creators of IBIS models since they >are the owners of the source data necessary to create an IBIS model. > > The following is an outline of the proposed an IBIS Accuracy >Specification: > > 1. Scope > * Define which IBIS features and >driver families to cover. > * Define different levels of >accuracy so the user can decide which is appropriate for his or her own >application. > 2. Test Loads > * Define a minimum set of test >loads appropriate for the IBIS features and driver families covered. > 3. Measurement Techniques > * Provide selection criteria for >test equipment. > * Describe how to account for the >electrical characteristics of the test environment. > 4. Comparison Metrics > * Define a curve overlay metric >for use when IC processing conditions are known. > * Define an envelope metric for >use when IC processing conditions are unknown. > * Define a tabular format for >reporting the results of the above comparisons. > * Write a C program which >implements the above metrics and creates a summary table. > > > The intent behind the IBIS Accuracy Specification is to produce >a document that is as simple as possible and yet complete. If we are to >be successful, we need to focus on ease of implementation from the >perspective of the semiconductor manufacturer. Toward this end, we hope >some IBIS veterans will provide occasional editorial assistance to help >keep us on track. As we reach milestones in the development process, we >will publish our work for review by the IBIS Committee and Open Forum. >If the first revision of the IBIS Accuracy Specification passes, it will >become a an EIA-approved standard. > >************************************************************************ >******* > >DATA AND ANALYSIS: > > The idea of an IBIS Accuracy Specification was hatched at the >second meeting of the IBIS User's Group on December 4, 1997. These >meetings have been attended by some thirty to forty signal integrity >engineers who represent a depth of system design experience and a broad >base of system, semiconductor, and EDA firms. A common thread began to >emerge: model quality has been a significant concern for decades, >beginning with SPICE and continuing today with IBIS. We all agreed that >signal integrity engineers spend far too many scarce resources >addressing model issues; this detracts from job at hand, which is to >solve system-level circuitry problems. We also agreed that in order for >IBIS to continue making forward progress - and all seemed interested in >this - we need to establish some process for assessing IBIS model >accuracy. > > Among the model problems that we have uncovered over the years, >perhaps the most common can be characterized as SPICE models that are >not extracted from the I/O cell layout. IBIS models that are based on >SPICE models can share this same problem. Since we are bound by >intellectual property agreements, we are unable to disclose specific >examples. ESD diode characteristics are certainly one of the more >common problem areas, perhaps because extraction programs often do not >handle them properly. Another problem is that the vendor may >characterize the model under a standard load - typically a 50 pF >capacitor - and does not consider a transmission line load. We are >proposing at least two additional test loads: a transmission line >terminated into its characteristic impedance and an open-ended >transmission line, which checks the reflection coefficient of the I/O >buffer. These techniques are outlined in a paper presented at >DesignCon98 by Haller and Edlund, "Constructing Accurate Behavioral >Models of I/O Buffers." There is always the possibility with SPICE >models that the transistor model parameters do not reflect the true IC >fabrication conditions; this indicates a process control problem. >However, this kind of problem is very difficult for a system engineer to >diagnose if he or she does not have access to data from process and >model parameter monitors; this one reason why the semiconductor >manufacturer is the logical origin of IBIS models. > > In addition to the problems mentioned above, IBIS models >introduce another level of possible discrepancies between simulation and >hardware. For example, the modeling engineer may not have made use of >the IBIS features, e.g. VT tables, that were required to accurately >model a given I/O buffer. If the modeling engineer did not spend enough >time with the model, the user may find that it is not accurate over a >broad range of loading conditions. And when IBIS models are derived >from a single sample component, one is always left with the question of >where the sample lies in relation to typical, fast, and slow silicon. > > The IBIS Accuracy Sub-Committee has designed and built a simple >test board which demonstrates the techniques required to verify IBIS >model accuracy for a 16821 CMOS push-pull output buffer. The >device-under-test (DUT) drives a variety of test loads, as mentioned >above. A second DUT is connected to test structures which facilitate >measurement of IV curves and capacitance. When we finish debugging this >board, we will post the schematics, layer plots, Gerber files, test >procedures, and characterization report on the IBIS Web page. > >************************************************************************ >******* > >ANY OTHER BACKGROUND INFORMATION: > > "The purpose of the IBIS Accuracy Sub-Committee is to draft a >specification for a metric which may be used to measure IBIS models >against test silicon. It is our intention to have a specification >approved by January 1999 and to identify a semiconductor manufacturer to >serve as a beta site for the implementation of this specification by the >same date." > > The IBIS Accuracy Sub-Committee has strong representation from >the semiconductor, EDA, and system industries. We are already well on >the way toward implementation by two major semiconductor companies, >Fairchild Semiconductor and Texas Instruments. > > Greg Edlund, Digital Equipment (chair) > Fawn Engelmann, EMC > Greg Fitzgerald, Cadence Design Systems > Bob Haller, Digital Equipment > Bruce Heilbrunn, Stratus Computer > Peter LaFlamme, Fairchild Semiconductor > Harvey Stiegler, Texas Instruments > >************************************************************************ >******* > > >---------- >Greg Edlund, Principal Engineer >Server Product Development >Digital Equipment Corp. >129 Parker St. PKO3-1/20C >Maynard, MA 01754 >(978) 493-4157 voice >(978) 493-0941 FAX >greg.edlund@digital.com > > From owner-ibis Wed Mar 18 16:40:06 1998 Received: from wile.nesa.com ([204.240.29.30]) by server.vhdl.org (8.8.5/8.8.3) with SMTP id QAA08062 for ; Wed, 18 Mar 1998 16:40:05 -0800 (PST) Received: from porky.nesa.com(204.240.29.45) by wile.nesa.com via smap (V1.3) id sma002963; Wed Mar 18 16:31:55 1998 Message-Id: <3.0.3.32.19980318163154.0077b138@mail.nesa.com> X-Sender: breda@mail.nesa.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.3 (32) Date: Wed, 18 Mar 1998 16:31:54 -0500 To: si-list@silab.Eng.Sun.COM, ibis-users@eda.org From: Kathy Breda Subject: IBIS USER Meeting - 3/19/98, 3:00PM, at DEC, Hudson, MA Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" NOTE: If you are getting multiple copies of this IBIS mail and would like NOT to, please reply and I'll delete you from my IBIS distribution list. ****IBIS USER Meeting Reminder**** Date: Thursday, March 19, 1998 Time: 3:00 PM Location: Digital Equipment Corp., Hudson, MA Customer Conf. Center, D309, HLO2/third floor. Agenda Items Includes: 1) Review of BIRD titled "IBIS Accuracy Specification" submitted by Accuracy Sub-Committee (Greg Edlund) 2) IBIS training and Documentation (Paul Galloway) 2) Update on European IBIS Summit (Paul Galloway) 3) Review proposed content of IBIS User's WEB page (Kathy Breda) Directions to Meeting: Location: Customer Conf. Center, D309, HLO2/third floor. 77 Reed Road, Hudson, MA 01749-2895. Contact: Ask for Jeff Chu at the HLO2 main lobby. Phone numbers: Jeff's office, (978)568-4197 At the conference center, (978)568-6228. >From Route 495 Exit 25A Drive through two traffic lights, and up a hill to the Digital sign. The first light is Fitchburg St, at 1.3 miles. The second light is Route 85, at 1.7 miles. The Digital sign is at 2.3 miles. Turn left into the Digital driveway, and follow it to the left. Turn right at "Employee Entrance, HLO-1," or at "Visitor's Entrance, Helipad, HLO-2," and park. >From the South Take 495 North to exit 25A (labelled "To 85, Hudson"). The exit actually puts you on an access road, not onto Route 85. Follow the directions for getting to HLO from 495 exit 25A: >From the North Take 495 South to exit 25A, (labelled "To 85, Marlboro"). Follow the directions above for getting to HLO from 495 exit 25A. >From Logan International Airport Travel time is a little over one hour. While leaving Logan, follow the signs for the Sumner Tunnel. After the toll booth, try to stay in the right lane to enter the tunnel. After the tunnel, follow signs for Route 93/Expressway South. You will have to bear right 90 degrees after the tunnel, then bear left crossing beneath the Expressway before joining the Expressway. Follow the Expressway South about 1 mile, staying in the right lane. Exit onto the Mass Pike (Route 90) West. >From Boston Travel time is about one hour. Take Route 90 West to Exit 11A (labelled "495 North, Westboro"). Route 90 is the Massachusetts Turnpike, and is often labelled "Mass Pike". There will be tolls totalling $.70 or $1.60, depending on where you get on the Pike. Travel time from Boston to Exit 11 is about 45 minutes. Follow the directions for coming from the south: From owner-ibis Thu Mar 19 04:50:04 1998 Received: from PSDNTSERVER.psd.com.eg ([163.121.201.130]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id EAA19655 for ; Thu, 19 Mar 1998 04:49:57 -0800 (PST) Received: by NT_SERVER with Internet Mail Service (5.0.1457.3) id ; Thu, 19 Mar 1998 14:54:18 +0200 Message-ID: From: Sherif Abdel-Messih To: ibis-users@eda.org Subject: New subcriber Date: Thu, 19 Mar 1998 14:54:15 +0200 X-Priority: 3 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.0.1457.3) Content-Type: text/plain Dear Sir I would like tosubcribe as IBIS member Yours Sherif a.MESSIH Elecrronic engineer From owner-ibis Fri Mar 20 16:25:53 1998 Received: from morse.cri.tatung.com.tw (cri.tatung.com.tw [139.223.28.160]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id QAA23172 for ; Fri, 20 Mar 1998 16:25:52 -0800 (PST) Received: by morse.cri.tatung.com.tw with Internet Mail Service (5.0.1458.49) id ; Sat, 21 Mar 1998 08:20:46 +0800 Message-ID: <039D0B78FF5FD111876E0000F8751090047E@morse.cri.tatung.com.tw> From: =?Big5?B?p2SpdsBN?= To: ibis-users@eda.org Subject: Reference voltage for PECL Date: Fri, 20 Mar 1998 14:24:55 +0800 X-Priority: 3 MIME-Version: 1.0 X-Mailer: Internet Mail Service (5.0.1458.49) Content-Type: text/plain; charset="iso-8859-1" Dear IBIS users, We all know that the reference voltage for ECL is 0V both for the pull-up and pull-down V/I behaviour. I have two questions, 1. How about the PECL? Is it 3.3V (for Low voltage)? 2. In the IBIS format, V(table) = V(ref) - V(out) for pull-up and V(table) = V(out) for pull-down. Is it also correct for ECL and PECL? Thanks for your help. T.L.Wu From owner-ibis Sat Mar 21 15:25:40 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id PAA12868 for ; Sat, 21 Mar 1998 15:25:40 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id PAA21355; Sat, 21 Mar 1998 15:22:14 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.7.5/CF5.38R) id PAA11526; Sat, 21 Mar 1998 15:22:12 -0800 (PST) From: bobr@wv.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA12161; Sat, 21 Mar 98 15:22:49 PST Date: Sat, 21 Mar 98 15:22:49 PST Message-Id: <9803212322.AA12161@bob> To: ibis-users@eda.org, wtl@cri.tatung.com.tw Subject: Re: Reference voltage for PECL Hello: Answers are below. Best Regards, Bob Ross Interconnectix/Mentor Graphics > From: =?Big5?B?p2SpdsBN?= > To: ibis-users@eda.org > Subject: Reference voltage for PECL > Date: Fri, 20 Mar 1998 14:24:55 +0800 > Dear IBIS users, > We all know that the reference voltage for ECL is 0V both for the > pull-up and pull-down V/I behaviour. > I have two questions, > 1. How about the PECL? Is it 3.3V (for Low voltage)? Set both [Pulldown Reference Voltage] and [Pullup Reference Voltage] to 3.3 V. > 2. In the IBIS format, V(table) = V(ref) - V(out) for pull-up and > V(table) = V(out) for pull-down. Is it also correct for ECL and PECL? Yes > Thanks for your help. > T.L.Wu From owner-ibis Tue Mar 24 23:42:21 1998 Received: from mailgate.cadence.com (mailgate.Cadence.COM [158.140.2.1]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id XAA27157 for ; Tue, 24 Mar 1998 23:42:20 -0800 (PST) Received: (from smap@localhost) by mailgate.cadence.com (8.8.5/8.6.8) id XAA28079 for ; Tue, 24 Mar 1998 23:39:29 -0800 (PST) Received: from corona.cadence.com(158.140.127.12) by mailgate.cadence.com via smap (mjr-v1.2) id xma890811566.028074; Tue, 24 Mar 98 23:39:26 -0800 Received: (from ads@localhost) by corona.cadence.com (8.8.5/8.8.5) id NAA05717; Wed, 25 Mar 1998 13:10:44 +0531 (IST) Date: Wed, 25 Mar 1998 13:10:44 +0531 (IST) From: "A. D. Shirpadaraj" Message-Id: <199803250739.NAA05717@corona.cadence.com> To: ibis-users@eda.org Subject: Transit time extraction related issues for IBIS 3.0 Cc: ads@corona.cadence.com X-Sun-Charset: US-ASCII Hi, Can anybody explain me the importance of Transit time information(with reference to IBIS 3.0 spec). I simulated an I/O buffer spice netlist(disabling the output so that I can get only clamp data), attaching the load(as specified in the section "Notes on Data derivation method" of IBIS 3.0 spec doc) and connecting a pulse generator with falling edge rate of 1ns. Input of I/O buffer is at Gnd level. _________ _______ | | ______________ |PULSE | |I/O BUFF |--0-----|______________|-------\/\/\/\----|GEN | __ | | ^ T LINE 10 OHM |_______| \ --------- | \ | \______ |____ tdrv The simulation result is as follows, time voltage voltage (Pulse gen) tdrv 0. 3.3000 3.3000 400.00000p 1.9800 3.3000 800.00000p 660.0000m 3.3000 1.20000n 0. 2.7999 1.60000n 0. 1.1855 2.00000n 0. -745.8083m 2.40000n 0. -765.5829m 2.80000n 0. -764.9445m 3.20000n 0. -766.0098m 3.60000n 0. -743.5182m 4.00000n 0. -593.9329m 4.40000n 0. -480.4755m 4.80000n 0. -451.3177m 5.20000n 0. -454.4898m 5.60000n 0. -286.7090m 6.00000n 0. 152.1383m 6.40000n 0. 292.0734m 6.80000n 0. 307.6836m 7.20000n 0. 300.9822m 7.60000n 0. 323.2456m 8.00000n 0. 243.2512m 8.40000n 0. -10.6594m 8.80000n 0. -152.1871m 9.20000n 0. -193.6911m 9.60000n 0. -196.4707m 10.00000n 0. -222.0614m 10.40000n 0. -164.7043m 10.80000n 0. -24.4593m 11.20000n 0. 78.7876m 11.60000n 0. 115.6422m 12.00000n 0. 125.1014m 12.40000n 0. 145.4857m 12.80000n 0. 119.0935m 13.20000n 0. 35.9285m 13.60000n 0. -34.7450m 14.00000n 0. -69.3589m 14.40000n 0. -80.1839m 14.80000n 0. -96.5231m 15.00000n 0. -100.8460m The driver output is having both positive and negative glitches. How to find transit time (TT) from this data. What extra information does the TT keyword conveys to a signal integrity analyser? Whether all buffers have some finite amount of TT or only some with strong clamp. Thanks A.D. Shripadaraj Cadence Design Systems NOIDA, INDIA ads@cadence.com From owner-ibis Wed Mar 25 04:28:20 1998 Received: from palrel3.hp.com (palrel3.hp.com [156.153.255.226]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id EAA01938 for ; Wed, 25 Mar 1998 04:28:19 -0800 (PST) From: JEAN-CHRISTOPHE_PAUTRAT@HP-France-om5.om.hp.com Received: from rossini.grenoble.hp.com (rossini.grenoble.hp.com [15.128.127.193]) by palrel3.hp.com (8.8.5/8.8.5tis) with ESMTP id EAA23032 for ; Wed, 25 Mar 1998 04:25:25 -0800 (PST) Received: from localhost (root@localhost) by rossini.grenoble.hp.com with SMTP (8.7.6/8.7.3 TIS Messaging 5.0 Openmail) id NAA11413 for ibis-users@vhdl.org; Wed, 25 Mar 1998 13:25:22 +0100 (MET) X-OpenMail-Hops: 1 Date: Wed, 25 Mar 1998 13:25:21 +0100 Message-Id: Subject: Vih, Vil, Vmeas etc.. MIME-Version: 1.0 TO: ibis-users@vhdl.org Content-Type: text/plain; charset=US-ASCII; name="cc:Mail" Content-Disposition: inline; filename="cc:Mail" Content-Transfer-Encoding: 7bit Hi all, I wonder if someone already made the same comment ; The [Model] statement only allows 1 value for Vih, Vil, Vmeas, Cref, Vref, Rref. Whereas the PCI or AGP, for example, specify Vih,Vil & Vmeas as a ratio of the power supply. Also, the test conditions can be different between rising and falling edges (exple : Cref=10pF for all AGP max timings and 0pF for min timings). I think ibis spec should include typ/min/max statement for all these values plus a 2 test load conditions for rising and falling edges. Is this going to be included into 3.0 or 3.1 ? note : as of today, the only patch I found is to cope with several ibis files ! not very easy. thanks, Jean-Christophe PAUTRAT, HEWLETT-PACKARD. From owner-ibis Wed Mar 25 07:28:40 1998 Received: from relayhost.vlsi.com (relayhost.vlsi.com [134.27.20.23]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id HAA04903 for ; Wed, 25 Mar 1998 07:28:40 -0800 (PST) Received: (from nobody@localhost) by relayhost.vlsi.com (8.6.12/Hub-Perlotto/050895) id HAA27303 for ; Wed, 25 Mar 1998 07:25:18 -0800 Received: from anubis.tempe.vlsi.com(134.27.128.1) by tweety via smap (V2.0) id xma027269; Wed, 25 Mar 98 07:25:02 -0800 Received: from mailserver.tempe.vlsi.com (mailserver.tempe.vlsi.com [134.27.128.5]) by relayhost.tempe.vlsi.com (8.6.9/Hub-Perlotto/101195) with ESMTP id IAA27417 for ; Wed, 25 Mar 1998 08:24:59 -0700 Received: from tempe.vlsi.com ([134.27.133.12]) by mailserver.tempe.vlsi.com (Netscape Mail Server v2.02) with ESMTP id AAA21547 for ; Wed, 25 Mar 1998 08:24:58 -0700 Sender: dc.sessions@tempe.vlsi.com (D.C. Sessions) Message-ID: <351921CA.24A57C5D@tempe.vlsi.com> Date: Wed, 25 Mar 1998 08:24:58 -0700 From: "D. C. Sessions" Reply-To: ibis-users@vhdl.org Organization: VLSI Technology Inc. X-Mailer: Mozilla 4.03 [en] (X11; U; SunOS 5.5.1 sun4m) MIME-Version: 1.0 To: ibis-users@vhdl.org Subject: Re: Vih, Vil, Vmeas etc.. References: Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit JEAN-CHRISTOPHE_PAUTRAT@HP-France-om5.om.hp.com wrote: > The [Model] statement only allows 1 value for Vih, Vil, Vmeas, Cref, > Vref, Rref. Whereas the PCI or AGP, for example, specify Vih,Vil & > Vmeas as a ratio of the power supply. Also, the test conditions can be > different between rising and falling edges (exple : Cref=10pF for all > AGP max timings and 0pF for min timings). AGP inputs are actually differential, and that's how they should be characterized. > I think ibis spec should include typ/min/max statement for all these > values plus a 2 test load conditions for rising and falling edges. As for the test loads, capacitive test loads are evil. The whole idea of IBIS is that if you know what the driver characteristics really are you can derive the behavior for a wide range of loads. -- D. C. Sessions dc.sessions@tempe.vlsi.com From owner-ibis Thu Mar 26 15:42:41 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id PAA04785 for ; Thu, 26 Mar 1998 15:42:40 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id PAA07055; Thu, 26 Mar 1998 15:39:15 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.7.5/CF5.38R) id PAA17600; Thu, 26 Mar 1998 15:39:11 -0800 (PST) From: bobr@wv.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA02227; Thu, 26 Mar 98 15:39:12 PST Date: Thu, 26 Mar 98 15:39:12 PST Message-Id: <9803262339.AA02227@bob> To: ibis-users@eda.org, wtl@cri.tatung.com.tw Subject: Reference Voltage for PECL Hello: I goofed and gave the wrong answer to a recent question below. The corrected response is noted below. I am sorry if this has caused a problem. Best Regards, Bob Ross Interconnectix/Mentor Graphics From: bobr@wv.mentorg.com (Bob Ross) Date: Sat, 21 Mar 98 15:22:49 PST To: ibis-users@eda.org, wtl@cri.tatung.com.tw Subject: Re: Reference voltage for PECL Hello: Answers are below. Best Regards, Bob Ross Interconnectix/Mentor Graphics > From: =?Big5?B?p2SpdsBN?= > To: ibis-users@eda.org > Subject: Reference voltage for PECL > Date: Fri, 20 Mar 1998 14:24:55 +0800 > Dear IBIS users, > We all know that the reference voltage for ECL is 0V both for the > pull-up and pull-down V/I behaviour. > I have two questions, > 1. How about the PECL? Is it 3.3V (for Low voltage)? Set both [Pulldown Reference Voltage] and [Pullup Reference Voltage] to 3.3 V. CORRECT > 2. In the IBIS format, V(table) = V(ref) - V(out) for pull-up and > V(table) = V(out) for pull-down. Is it also correct for ECL and PECL? Yes WRONG - The answer is NO. I was thinking yes, both ECL and PECL follow the same convention. However, the V(table) = V(ref) - V(out) convention applies to BOTH the [Pullup] and [Pulldown] tables for ECL and PECL. I thank Tom Dagostino for pointing this out to me. > Thanks for your help. > T.L.Wu From owner-ibis Fri Mar 27 16:52:15 1998 Received: from newsgw.mentorg.com (newsgw.mentorg.com [192.94.38.66]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id QAA27977 for ; Fri, 27 Mar 1998 16:52:14 -0800 (PST) Received: from em-wv03.wv.mentorg.com by newsgw.mentorg.com (8.8.8/CF5.40F) id QAA11093; Fri, 27 Mar 1998 16:48:44 -0800 (PST) Received: from bob by em-wv03.wv.mentorg.com (8.7.5/CF5.38R) id QAA22089; Fri, 27 Mar 1998 16:48:41 -0800 (PST) From: bobr@wv.mentorg.com (Bob Ross) Received: by bob (4.1/CF5.23L) id AA03089; Fri, 27 Mar 98 16:48:44 PST Date: Fri, 27 Mar 98 16:48:44 PST Message-Id: <9803280048.AA03089@bob> To: ibis-users@eda.org Subject: Re: Transit time extraction related issues for IBIS 3.0 Cc: ads@corona.cadence.com Hello A.D.: I will respond only briefly to your question since I am involved on some other issues right now. While the TT parameter estimate might exist within the Spice code, it still may only be an estimate. Use it as a starting point, if available. The process is to simulate the same model in your simulator and see if it exhibits the same kickback response starting around 6 nS without TTgnd. If the response is already close, do nothing. If not, try TTgnd of about 6 nS and see if that causes about the same response. If the simulated kickback is at a different location, then to iterate on a value that matches the Spice (or measured data) to get the effective TTgnd for the purposes of simulation. Note, the Intent of this addition is to give a first order presentation of the kickback effect only when it is a factor. Due to some diode series R details, the simulation probably will not correspond exactly with the Spice simulation. Best Regards, Bob Ross Interconnectix/Mentor Graphics. > Date: Wed, 25 Mar 1998 13:10:44 +0531 (IST) > From: "A. D. Shirpadaraj" > Message-Id: <199803250739.NAA05717@corona.cadence.com> > To: ibis-users@eda.org > Subject: Transit time extraction related issues for IBIS 3.0 > Cc: ads@corona.cadence.com > Hi, > Can anybody explain me the importance of Transit time information(with > reference to IBIS 3.0 spec). > I simulated an I/O buffer spice netlist(disabling the output so that I > can get only clamp data), attaching the load(as specified in the section > "Notes on Data derivation method" of IBIS 3.0 spec doc) and connecting > a pulse generator with falling edge rate of 1ns. > Input of I/O buffer is at Gnd level. > _________ _______ > | | ______________ |PULSE | > |I/O BUFF |--0-----|______________|-------\/\/\/\----|GEN | __ > | | ^ T LINE 10 OHM |_______| \ > --------- | \ > | \______ > |____ tdrv > The simulation result is as follows, > time voltage voltage > (Pulse gen) tdrv > 0. 3.3000 3.3000 > 400.00000p 1.9800 3.3000 > 800.00000p 660.0000m 3.3000 > 1.20000n 0. 2.7999 > 1.60000n 0. 1.1855 > 2.00000n 0. -745.8083m > 2.40000n 0. -765.5829m > 2.80000n 0. -764.9445m > 3.20000n 0. -766.0098m > 3.60000n 0. -743.5182m > 4.00000n 0. -593.9329m > 4.40000n 0. -480.4755m > 4.80000n 0. -451.3177m > 5.20000n 0. -454.4898m > 5.60000n 0. -286.7090m > 6.00000n 0. 152.1383m > 6.40000n 0. 292.0734m > 6.80000n 0. 307.6836m > 7.20000n 0. 300.9822m > 7.60000n 0. 323.2456m > 8.00000n 0. 243.2512m > 8.40000n 0. -10.6594m > 8.80000n 0. -152.1871m > 9.20000n 0. -193.6911m > 9.60000n 0. -196.4707m > 10.00000n 0. -222.0614m > 10.40000n 0. -164.7043m > 10.80000n 0. -24.4593m > 11.20000n 0. 78.7876m > 11.60000n 0. 115.6422m > 12.00000n 0. 125.1014m > 12.40000n 0. 145.4857m > 12.80000n 0. 119.0935m > 13.20000n 0. 35.9285m > 13.60000n 0. -34.7450m > 14.00000n 0. -69.3589m > 14.40000n 0. -80.1839m > 14.80000n 0. -96.5231m > 15.00000n 0. -100.8460m > The driver output is having both positive and negative glitches. > How to find transit time (TT) from this data. > What extra information does the TT keyword conveys to a > signal integrity analyser? Whether all buffers have some finite amount > of TT or only some with strong clamp. > Thanks > A.D. Shripadaraj > Cadence Design Systems > NOIDA, INDIA > ads@cadence.com From owner-ibis Sat Mar 28 13:54:43 1998 Received: from hawk.us-power.com (hawk.us-power.com [206.147.67.2]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id NAA15931 for ; Sat, 28 Mar 1998 13:54:42 -0800 (PST) Received: from cardinal ([209.98.11.34] (may be forged)) by hawk.us-power.com with SMTP id QAA07035 for ; Sat, 28 Mar 1998 16:25:16 -0600 Message-Id: <199803282225.QAA07035@hawk.us-power.com> Reply-To: From: "John Synesiou" To: Subject: Spice Model of IBIS Date: Sat, 28 Mar 1998 15:50:52 -0600 X-Priority: 3 (Normal) X-MSMail-Priority: Normal Importance: Normal X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 In-Reply-To: <9803280048.AA03089@bob> I would like to know if there is any reason why an IBIS model of a gate cannot be modeled using a SPICE simulator, specifically a SPICE 3 compatible simulator. Since IBIS, refers to the I/O characteristics of the gate, why not use SPICE to model these characteristics? The package parasitics are easy to model in SPICE, and the V/I tables can be modeled using if-then-else statements. I wonder why a new syntax was developed for IBIS, rather than using SPICE syntax. I would like to think that there was some very compelling reason why a new syntax was necessary and why it is necessary for me to purchase yet another simulator. I see SPICE to IBIS converters are available, what about an IBIS to SPICE converter? Regards John Synesiou jsynesio@us-power.com U.S. Power, Inc Phone (612)826-1111 6497 City West Parkway Fax (612)826-1003 Eden Prairie Date: 03/28/98 MN, 55344 Time: 2:24 PM From owner-ibis Sat Mar 28 16:04:05 1998 Received: from mail.nwlink.com (alabama.nwlink.com [209.20.130.40]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id QAA17730 for ; Sat, 28 Mar 1998 16:04:04 -0800 (PST) Received: from stargate (mail.hyperlynx.com [209.20.148.70]) by mail.nwlink.com (8.8.8/8.8.8) with SMTP id QAA09428; Sat, 28 Mar 1998 16:00:58 -0800 (PST) Message-Id: <3.0.32.19980328160218.009ab490@mail.nwlink.com> X-Sender: kellee@mail.nwlink.com X-Mailer: Windows Eudora Pro Version 3.0 (32) Date: Sat, 28 Mar 1998 16:02:25 -0800 To: , From: Kellee Crisafulli Subject: Re: Spice Model of IBIS Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Hi John, You asked basically why IBIS was created when SPICE already existed and why can't it be used in SPICE. Really you should think of IBIS as somewhere between a true model and specification. It is really more a specification for what the parts do then a model. Think of it like a data book describing the characteristics of the part. For example there are V/I curves just like in a data book. IBIS can be used with SPICE. Many of the SPICE tool vendors have a SPICE sub circuit for running the IBIS specification. Just ask your SPICE vendor for a sub-circuit model. If your vendor doesn't have one, find a better simulator package. To answer your questions about IBIS it was specifically developed to fix the major problems not addressed by spice for doing IC signal integrity simualtion. A large number of SPICE users were involved in the development of IBIS to resolve problems that SPICE alone could not address i.e. 1) SPICE models were not portable even between spice tools since IC designers are very often using special transistor models not available in most spice packages used by systems engineers. 2) SPICE models gave away all the design tricks the IC companies wanted protected. This meant they would not distribute models without non-disclosure agreements which must be signed by a board member or V.P. or President level to be valid. 3) SPICE has no rules so there is no minimum requirements to be a spice model. IBIS models provides sufficient detail about the component characteristics to allow signal integrity, EMC analysis and high speed design work. Since SPICE models don't have any agreed upon standards there is no way to tell if the information needed will be present and where to find it. 4) There is no way to embed testing specifications in SPICE. IBIS contains testing constraints as well as device characteristics. 5) SPICE has no way to indicate best/worst case limits the manufacturer wants you to design to, IBIS does. 6) IBIS has been extended to include resistor and capacitor packages as well as diode packages. This can be done in SPICE, but there are again no rules about what information is present and how it is organized. This works OK (though a bit of extra work in a schematic level simulator) however it does not work very well if the model must be used at the board level and automatically loaded. 7) IBIS is also being extended to do connector models. This is an area than can be done in SPICE, but lack of standards in SPICE has prevented any standard method for modeling connectors from being developed. IBIS will provide a set of rules that everyone can follow to insure portable models that will automatically load without user intervention. 8) There isn't any standards organization supporting SPICE format changes. IBIS is an EIA specification and is a standard that everyone can use and design to. At 03:50 PM 3/28/98 -0600, John Synesiou wrote: >I would like to know if there is any reason why an IBIS model of a gate >cannot be modeled using a SPICE simulator, specifically a SPICE 3 compatible >simulator. Since IBIS, refers to the I/O characteristics of the gate, why >not use SPICE to model these characteristics? The package parasitics are >easy to model in SPICE, and the V/I tables can be modeled using if-then-else >statements. >I wonder why a new syntax was developed for IBIS, rather than using SPICE >syntax. > >I would like to think that there was some very compelling reason why a new >syntax was necessary and why it is necessary for me to purchase yet another >simulator. I see SPICE to IBIS converters are available, what about an IBIS >to SPICE converter? > >Regards > >John Synesiou jsynesio@us-power.com >U.S. Power, Inc Phone (612)826-1111 >6497 City West Parkway Fax (612)826-1003 >Eden Prairie Date: 03/28/98 >MN, 55344 Time: 2:24 PM > > > > > From owner-ibis Sat Mar 28 16:16:47 1998 Received: from hawk.us-power.com (hawk.us-power.com [206.147.67.2]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id QAA17888 for ; Sat, 28 Mar 1998 16:16:46 -0800 (PST) Received: from cardinal ([209.98.11.34] (may be forged)) by hawk.us-power.com with SMTP id SAA07642 for ; Sat, 28 Mar 1998 18:47:19 -0600 Message-Id: <199803290047.SAA07642@hawk.us-power.com> Reply-To: From: "John Synesiou" To: Subject: RE: Spice Model of IBIS Date: Sat, 28 Mar 1998 18:12:58 -0600 X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 Importance: Normal In-Reply-To: <9803280048.AA03089@bob> Thank you to all those people who responded to my last posting. I guess my previous question wasn't very clear, and so I got the standard response that SPICE is a functional simulator, not a behavioral simulator. I wasn't proposing to use SPICE as a functional simulator, but rather I was proposing to use SPICE as a behavioral simulator. If you construct a SPICE model equivalent to IBIS 2.1 or 3 model, using tables in the same way IBIS does, then SPICE can be used as a behavioral simulator. Ian Dodd pointed out that the syntax used by various SPICE simulators for behavioral simulation tends to be proprietary to each SPICE vendor. Is this really the case? If proprietary syntax is the problem, then why not propose a standard behavioral syntax be added to SPICE? Regards John Synesiou jsynesio@us-power.com U.S. Power, Inc Phone (612)826-1111 6497 City West Parkway Fax (612)826-1003 Eden Prairie Date: 03/28/98 MN, 55344 Time: 5:59 PM From owner-ibis Sat Mar 28 17:29:56 1998 Received: from hawk.us-power.com (hawk.us-power.com [206.147.67.2]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id RAA18867 for ; Sat, 28 Mar 1998 17:29:46 -0800 (PST) Received: from cardinal ([209.98.11.34] (may be forged)) by hawk.us-power.com with SMTP id TAA08158; Sat, 28 Mar 1998 19:59:45 -0600 Message-Id: <199803290159.TAA08158@hawk.us-power.com> Reply-To: From: "John Synesiou" To: "Kellee Crisafulli" , Subject: RE: Spice Model of IBIS Date: Sat, 28 Mar 1998 19:25:24 -0600 X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 Importance: Normal In-Reply-To: <3.0.32.19980328160218.009ab490@mail.nwlink.com> Thank you Kellee for a very detailed explanation of the benefits of IBIS syntax over SPICE. If you don't mind, at the risk of appearing argumentative, I'd like to explore this issue further. Here are some ideas I think may address some of the issues you raised. Why not propose a template for a SPICE model that implements the IBIS specification. All IC manufacturers could fill in key parameters and add V/I tables required by the IBIS specification. A similar syntax checker could be used to parse and validate the SPICE model. This model would expose only the information required by the IBIS model. Impose the same IBIS syntax rules on the SPICE model. Use Tolerance for best/worst case and use Monte Carlo analysis. I'm not sure how to address the embedded testing issue you raised, but maybe one of the SPICE vendors can assist in this area. I think you raise some very important issues, but why not take the time to develop a SPICE compatible standard that addresses all these requirements, rather than developing yet another standard. My understanding is that SPICE has been around for years and will always be far more flexible to analyze circuit dynamics than the relatively new IBIS simulators. Why not take advantage of the wealth of analysis tools available with SPICE simulators. For the record, I am in no way affiliated with any SPICE vendor. I use multiple simulators such as SPICE, VHDL, etc and I'd like to avoid investing in yet another simulator if possible. Further more, I'd prefer to avoid learning how to use another tools, and worse take the time to verify the output of the simulator, you know garbage in garbage out. -----Original Message----- From: Kellee Crisafulli [mailto:kellee@hyperlynx.com] Sent: Saturday, March 28, 1998 6:02 PM To: jsynesio@us-power.com; ibis-users@eda.org Subject: Re: Spice Model of IBIS Hi John, You asked basically why IBIS was created when SPICE already existed and why can't it be used in SPICE. Really you should think of IBIS as somewhere between a true model and specification. It is really more a specification for what the parts do then a model. Think of it like a data book describing the characteristics of the part. For example there are V/I curves just like in a data book. IBIS can be used with SPICE. Many of the SPICE tool vendors have a SPICE sub circuit for running the IBIS specification. Just ask your SPICE vendor for a sub-circuit model. If your vendor doesn't have one, find a better simulator package. To answer your questions about IBIS it was specifically developed to fix the major problems not addressed by spice for doing IC signal integrity simualtion. A large number of SPICE users were involved in the development of IBIS to resolve problems that SPICE alone could not address i.e. 1) SPICE models were not portable even between spice tools since IC designers are very often using special transistor models not available in most spice packages used by systems engineers. 2) SPICE models gave away all the design tricks the IC companies wanted protected. This meant they would not distribute models without non-disclosure agreements which must be signed by a board member or V.P. or President level to be valid. 3) SPICE has no rules so there is no minimum requirements to be a spice model. IBIS models provides sufficient detail about the component characteristics to allow signal integrity, EMC analysis and high speed design work. Since SPICE models don't have any agreed upon standards there is no way to tell if the information needed will be present and where to find it. 4) There is no way to embed testing specifications in SPICE. IBIS contains testing constraints as well as device characteristics. 5) SPICE has no way to indicate best/worst case limits the manufacturer wants you to design to, IBIS does. 6) IBIS has been extended to include resistor and capacitor packages as well as diode packages. This can be done in SPICE, but there are again no rules about what information is present and how it is organized. This works OK (though a bit of extra work in a schematic level simulator) however it does not work very well if the model must be used at the board level and automatically loaded. 7) IBIS is also being extended to do connector models. This is an area than can be done in SPICE, but lack of standards in SPICE has prevented any standard method for modeling connectors from being developed. IBIS will provide a set of rules that everyone can follow to insure portable models that will automatically load without user intervention. 8) There isn't any standards organization supporting SPICE format changes. IBIS is an EIA specification and is a standard that everyone can use and design to. Regards John Synesiou jsynesio@us-power.com U.S. Power, Inc Phone (612)826-1111 6497 City West Parkway Fax (612)826-1003 Eden Prairie Date: 03/28/98 MN, 55344 Time: 6:32 PM From owner-ibis Mon Mar 30 10:55:18 1998 Received: from thalia.fm.intel.com (thalia.fm.intel.com [132.233.247.11]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id KAA25731 for ; Mon, 30 Mar 1998 10:55:13 -0800 (PST) Received: from fmmail.fm.intel.com (fmmail.fm.intel.com [198.175.75.69]) by thalia.fm.intel.com (8.8.6/8.8.5) with ESMTP id KAA24692 for ; Mon, 30 Mar 1998 10:52:13 -0800 (PST) Received: (from ccmgate@localhost) by fmmail.fm.intel.com (8.8.5/8.7.3) id KAA19588 for ibis-users@eda.org; Mon, 30 Mar 1998 10:45:34 -0800 (PST) Received: by ccm.fm.intel.com (ccmgate 3.2 #2) Mon, 30 Mar 98 10:45:34 PST Date: Mon, 30 Mar 98 09:24:00 PST From: Arpad Muranyi Message-ID: To: jsynesio@us-power.com_at_internet_gateway@ccm.fm.intel.com, ibis-users@eda.org Subject: Re[2]: Spice Model of IBIS Text item: John, Short of proposing a standard, we have done just that (last paragraph in included message below). About five or so years ago we asked several SPICE vendors to support IBIS (behavioral) modeling by improving the existing controlled sources. Neither one of the companies responded positively, because they felt that their main strengths was in transistor level modeling. Since then all I can do is tell people who are asking for behavioral SPICE models to go to their SPICE vendor and let them know about their need. Maybe customer demand will change their mind. By the way, the whole IBIS idea started from my behavioral modeling work in HSPICE, so it can be done, but it would be a lot easier and more robust with more IBIS specific controlled elements. Sincerely, Arpad Muranyi Intel Corporation ================================================================================ Thank you to all those people who responded to my last posting. I guess my previous question wasn't very clear, and so I got the standard response that SPICE is a functional simulator, not a behavioral simulator. I wasn't proposing to use SPICE as a functional simulator, but rather I was proposing to use SPICE as a behavioral simulator. If you construct a SPICE model equivalent to IBIS 2.1 or 3 model, using tables in the same way IBIS does, then SPICE can be used as a behavioral simulator. Ian Dodd pointed out that the syntax used by various SPICE simulators for behavioral simulation tends to be proprietary to each SPICE vendor. Is this really the case? If proprietary syntax is the problem, then why not propose a standard behavioral syntax be added to SPICE? Regards John Synesiou jsynesio@us-power.com U.S. Power, Inc Phone (612)826-1111 6497 City West Parkway Fax (612)826-1003 Eden Prairie Date: 03/28/98 MN, 55344 Time: 5:59 PM Text item: External Message Header The following mail header is for administrative use and may be ignored unless there are problems. ***IF THERE ARE PROBLEMS SAVE THESE HEADERS***. In-Reply-To: <9803280048.AA03089@bob> Importance: Normal X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 X-MSMail-Priority: Normal X-Priority: 3 (Normal) Date: Sat, 28 Mar 1998 18:12:58 -0600 Subject: RE: Spice Model of IBIS To: From: "John Synesiou" Reply-To: Message-Id: <199803290047.SAA07642@hawk.us-power.com> Received: from cardinal ([209.98.11.34] (may be forged)) by hawk.us-power.com with SMTP id SAA07642 for ; Sat, 28 Mar 1998 18:47:19 -0600 Received: from hawk.us-power.com (hawk.us-power.com [206.147.67.2]) by server.vh dl.org (8.8.5/8.8.3) with ESMTP id QAA17888 for ; Sat, 28 Ma r 1998 16:16:46 -0800 (PST) Received: from server.vhdl.org (server.vhdl.org [198.31.14.3]) by thalia.fm.intel.com (8.8.6/8.8.5) with ESMTP id QAA19746; Sat, 28 Mar 1998 16:31:14 -0800 (PST) Received: from thalia.fm.intel.com (thalia.fm.intel.com [132.233.247.11]) by fmm ail.fm.intel.com (8.8.5/8.7.3) with ESMTP id QAA01836; Sat, 28 Mar 1998 16:26:25 -0800 (PST) Return-Path: owner-ibis@server.vhdl.org From owner-ibis Mon Mar 30 17:05:55 1998 Received: from InterJet.apsimtech.com (apsimtech.com [209.21.21.35]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id RAA02029 for ; Mon, 30 Mar 1998 17:05:49 -0800 (PST) Received: (from daemon@localhost) by InterJet.apsimtech.com (8.8.5/8.8.5) id QAA13355; Mon, 30 Mar 1998 16:08:02 -0800 (PST) Received: from UNKNOWN(), claiming to be "contec12" via SMTP by InterJet.apsimtech.com, id smtpd013353; Mon Mar 30 16:08:02 1998 Sender: fred@apsimtech.com Message-ID: <35203411.479B@apsimtech.com> Date: Mon, 30 Mar 1998 16:08:49 -0800 From: Fred Balistreri Organization: Apsim X-Mailer: Mozilla 3.01 (X11; I; SunOS 5.3 sun4c) MIME-Version: 1.0 To: Kellee Crisafulli CC: jsynesio@us-power.com, ibis-users@eda.org Subject: Re: Spice Model of IBIS References: <3.0.32.19980328160218.009ab490@mail.nwlink.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Kellee Crisafulli wrote: > > Hi John, > > You asked basically why IBIS was created when SPICE already existed and why > can't it be used in SPICE. > > Really you should think of IBIS as somewhere between a true model and > specification. > It is really more a specification for what the parts do then a model. > Think of it > like a data book describing the characteristics of the part. For example > there are > V/I curves just like in a data book. > > IBIS can be used with SPICE. Many of the SPICE tool vendors have a > SPICE sub circuit for running the IBIS specification. > Just ask your SPICE vendor for a sub-circuit model. If your vendor > doesn't have one, find a better simulator package. > > To answer your questions about IBIS it was specifically developed to > fix the major problems not addressed by spice for doing IC signal integrity > simualtion. A large number of SPICE users were involved in the development > of IBIS to resolve problems that SPICE alone could not address i.e. > > 1) SPICE models were not portable even between spice tools since IC designers > are very often using special transistor models not available in most spice > packages used by systems engineers. > 2) SPICE models gave away all the design tricks the IC companies wanted > protected. > This meant they would not distribute models without non-disclosure > agreements > which must be signed by a board member or V.P. or President level to be > valid. > 3) SPICE has no rules so there is no minimum requirements to be a spice model. > IBIS models provides sufficient detail about the component > characteristics to > allow signal integrity, EMC analysis and high speed design work. Since > SPICE > models don't have any agreed upon standards there is no way to tell if the > information needed will be present and where to find it. > 4) There is no way to embed testing specifications in SPICE. IBIS contains > testing > constraints as well as device characteristics. > 5) SPICE has no way to indicate best/worst case limits the manufacturer > wants you > to design to, IBIS does. > 6) IBIS has been extended to include resistor and capacitor packages as > well as > diode packages. This can be done in SPICE, but there are again no rules > about > what information is present and how it is organized. This works OK > (though a > bit of extra work in a schematic level simulator) however it does not work > very well if the model must be used at the board level and automatically > loaded. > 7) IBIS is also being extended to do connector models. This is an area > than can > be done in SPICE, but lack of standards in SPICE has prevented any standard > method for modeling connectors from being developed. IBIS will provide a > set > of rules that everyone can follow to insure portable models that will > automatically > load without user intervention. > 8) There isn't any standards organization supporting SPICE format changes. > IBIS > is an EIA specification and is a standard that everyone can use and > design to. > > At 03:50 PM 3/28/98 -0600, John Synesiou wrote: > >I would like to know if there is any reason why an IBIS model of a gate > >cannot be modeled using a SPICE simulator, specifically a SPICE 3 compatible > >simulator. Since IBIS, refers to the I/O characteristics of the gate, why > >not use SPICE to model these characteristics? The package parasitics are > >easy to model in SPICE, and the V/I tables can be modeled using if-then-else > >statements. > > >I wonder why a new syntax was developed for IBIS, rather than using SPICE > >syntax. > > > >I would like to think that there was some very compelling reason why a new > >syntax was necessary and why it is necessary for me to purchase yet another > >simulator. I see SPICE to IBIS converters are available, what about an IBIS > >to SPICE converter? > > > >Regards > > > >John Synesiou jsynesio@us-power.com > >U.S. Power, Inc Phone (612)826-1111 > >6497 City West Parkway Fax (612)826-1003 > >Eden Prairie Date: 03/28/98 > >MN, 55344 Time: 2:24 PM > > > > > > > > > > My company supports both IBIS and Spice models. There are a variety of mistakes and misconceptions in what Kellee says about spice models. Statements 1 and 2 are true. In essence this is the whole reason for IBIS. Statement 3 is misleading. Spice is a simulator not a syntax or standard. The rules need to be developed by the people making the model not the simulator. Spice models levels have been around for years and the various levels are clear about what is modeled and what is not. Berekey documents the models very well and they are public. IBIS as it stands has not been approved for EMC and it's untested. Since there is no information about the power supply and gnd currents and their waveforms its doubtful that IBIS could be used in EMC at all. Repeated attempts to include this in the spec by Cadence and other IBIS knowledgeble people have been down played by other vendors who would be at a disadvantage technically by including the current specifications. Needless to say that Spice models do not suffer this fate. 4. I don't have a clue what Kellee is talking about. Is the embeded test the load resistance to test the model under? If so this has been a sore spot in IBIS for a long time. John Powel can tell you why Quad requires 2 sets of TR/TF data in their simulator. 5. This is bogus since IC desigers have been doing this for at least 30 years using Spice. Most if not all currenty avaliable IBIS models are made from Spice in the first place. Now how is that possbible if Spice doesn't or can't indicate best/worst case limits? 6. Not only can Spice to this but it can do this elequently, both at the schematic level and board level. Kellee you should learn more about using Spice subckts. It works wonderfully well at the board level thankyou, we've been doing this since 1992. 7. Spice connector models can be more robust than IBIS models. IBIS cannot handle a matrix type solution since the committee was unwilling/unable to come up with a coupling standard everybody would agree to. The result is pin based parasitics which are inaccurate and practically useless in some applications. It's true though that there is not set standard in Spice. Using lumped LCR networks will work in any Spice package though. 8. True. There is an upcomming EIA proposal from Japan that would formally standardize Spice models without giving out the propietary information. If it doesn't get killed by IBIS bigets it would be a good standard. Now there is good reasons for having IBIS models. As mentioned statements 1 and 2 are true. And there is some truth in most of the statements Kellee made. However Spice and Spice models should not be compared to IBIS data sheets. They are NOT the same thing. There are applications where IBIS has advantages. Those advantages are in simulation speed and simplicity. There are areas where IBIS falls short. Those areas are in flexibility, modeling, and accuracy. Syntax is the strength and weakness of IBIS. Since it takes more than one year to change the syntax/parser and everything that means it becomes a weakness. IBIS is an emerging standard but it has not withstood the test of time. On the other hand I don't know of a main stream EDA or IC company that does not use SPICE. That's something to think about. How about it Bob Ross and company when are we going to get a SPICE standard? I'm not the most popular guy around and have no plans to be in the future. But somebody should stand up and tell the truth in this industry once and awhile. The opinions stated above are my personnal ones and do not reflect the views of Applied Simulation Technology. Best regards to all! From owner-ibis Mon Mar 30 18:46:54 1998 Received: from hawk.us-power.com (hawk.us-power.com [206.147.67.2]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id SAA03572 for ; Mon, 30 Mar 1998 18:46:53 -0800 (PST) Received: from cardinal ([209.98.11.34] (may be forged)) by hawk.us-power.com with SMTP id VAA23282 for ; Mon, 30 Mar 1998 21:16:33 -0600 Message-Id: <199803310316.VAA23282@hawk.us-power.com> Reply-To: From: "John Synesiou" To: "IBIS-Reflector" Subject: FW: FW: Spice Model of IBIS Date: Mon, 30 Mar 1998 20:42:48 -0600 X-Priority: 3 (Normal) X-MSMail-Priority: Normal X-MimeOLE: Produced By Microsoft MimeOLE V4.72.2106.4 Importance: Normal Thank you to all those members who provided me with feedback regarding the use of SPICE for behavioral simulation. What I found interesting was everyone agreed that SPICE can be used to do exactly what IBIS was intended to do, however no standard SPICE syntax exists to make the model available across different platforms. I have included a response I obtained from my SPICE vendor as I believe it provided further insight to the issues, and presents several possible solutions. I'm not sure I agree with his conclusion, because if members of this newsgroup and other SPICE users are willing to choose one of the solutions presented below, most SPICE vendors lacking this functionality would probably add this to their product. Since multiple vendors support XSPICE syntax, then why not use a syntax based on XSPICE to implement a behavioral model? Regards John Synesiou jsynesio@us-power.com U.S. Power, Inc Phone (612)826-1111 6497 City West Parkway Fax (612)826-1003 Eden Prairie Date: 03/30/98 MN, 55344 Time: 7:23 PM John I could write a novel in response to some of these emails. But a couple of points. As a spice vendor we are committed to supporting IBIS. It's really not that big a deal for SPICE vendors to make subcircuits from IBIS data sheets. While we have made IBIS to spice conversions for customers, the task was rather timeconsuming and manual. We will be putting out a software utility to do the job. Syntactically IBIS is a good standard that spice vendors can use to make models. The other issue of IBIS tools being better solution for pcb analysis is a NON-ISSUE as far as IBIS syntax is concerned. A spice engine could be fitted with all such features so IBIS tools really have no inherent advantage. The underlying syntax would in any case be transparent to the user. Users should be able to use their SPICE simulators if they want to. If features to do a job are lacking in SPICE products that's a completely different question. As for SPICE, it is far more than a functional simulator. People who think otherwise need to wake up. They are living in the past by 5-10 years. Today spice simulators handle C code, ActiveX servers, Visual basic scripts, as well as full behavioral circuit descriptions using math equations, if-then-else statements, and table models. Virtually every commercial SPICE program has a full behavioral simulation capability allowing system, board and IC design to be simulated in ANY combination. With regard to a SPICE standard. True there is no standard spice behavioral syntax. I was able to derive a SPICE model from an IBIS data sheet using SPICE 2G6 syntax (See May 1993 Intusoft Newsletter). This would be compatible with ALL SPICE simulators. So this is one possibility. The Berkeley SPICE B element is the closest thing to a standard in the SPICE 3 world. The syntax problem is largely due to other SPICE vendors lack of desire to be cooperative (this is not sour grapes, its the hard truth. All attempts to get them to change\adapt to Berkeley spice or XSPICE syntax have met with indifference). But XSPICE, from Georgia Tech, could be the standard EVERYONE is looking for. Its public domain, its used by seven different SPICE vendors (Intusoft, Deutsch, Cad-Migos, Visionics, Electronic Workbench, Circuit maker), it hides the model implementation because its compiled (good for vendors), and the language is based on the most popular AHDL there is; C. The C part could make the model easily portable to those tools, SPICE or other, that don't have XSPICE. With regard to the need for IBIS, I stated from the outset when IBIS was being developed that a SPICE description could be found to solve the problem. Indeed, in most cases, the SPICE description DOES NOT reveal any hidden secrets about the technology or device architecture. These types of claims are usually made by people who only know SPICE as a transitor level simulator. They are often ignorant of SPICE's ability to model behavior in various ways as to hide the real circuits nature. Clearly, it is possible to even use a transistor topology since Philips, Texas Instruments, and Motorola freely distribute model done in this fashion. However, silly, people refuse to extend SPICE, probably because its syntax is not IEEE controlled. I wish it were. Anyway IBIS is here to stay. From owner-ibis Mon Mar 30 19:21:38 1998 Received: from mail.nwlink.com (alabama.nwlink.com [209.20.130.40]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id TAA04007 for ; Mon, 30 Mar 1998 19:21:37 -0800 (PST) Received: (from kellee@localhost) by mail.nwlink.com (8.8.8/8.8.8) id TAA00454; Mon, 30 Mar 1998 19:18:36 -0800 (PST) Message-Id: <3.0.5.32.19980330191839.00e57bc0@mail.nwlink.com> X-Sender: kellee@mail.nwlink.com X-Mailer: QUALCOMM Windows Eudora Pro Version 3.0.5 (32) Date: Mon, 30 Mar 1998 19:18:39 -0800 To: Fred Balistreri From: Kellee Crisafulli Subject: Re: Spice Model of IBIS Cc: jsynesio@us-power.com, ibis-users@eda.org In-Reply-To: <35203411.479B@apsimtech.com> References: <3.0.32.19980328160218.009ab490@mail.nwlink.com> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Hi Fred, Ouch, here are my responses to your points: > 3) SPICE has no rules so there is no minimum requirements to be a spice model. > IBIS models provides sufficient detail about the component characteristics to > allow signal integrity, EMC analysis and high speed design work. Since > SPICE models don't have any agreed upon standards there is no way to tell if the > information needed will be present and where to find it. >Fred Said: "IBIS as it stands has not been approved for EMC and it's untested" Several companies are using IBIS models as stimulus for EMC related products and have tested them. Yes there are more physical package related issues that need to be added to improve the accuracy. SI analysis had many years head start on EMC analysis and I feel considerable improvement can be made in this area in the future. > 4) There is no way to embed testing specifications in SPICE. IBIS contains > testing constraints as well as device characteristics. >Fred Said: "I don't have a clue what Kellee is talking about. Is the embeded test > the load resistance to test the model under?" These are things like threshold voltages, min and max specifications Vmeasure specification for flight time adjustments which allow the simulator delays to be used with timing tools. > 5) SPICE has no way to indicate best/worst case limits the manufacturer > wants you to design to, IBIS does. >Fred said: This is bogus since IC desigers have been doing this for at least 30 > Now how is that possbible if Spice doesn't or can't indicate best/worst case limits? We are talking about board designers not IC designers and board designers need to use min/max limits specified by the IC vendor. And min and max design limits are not provided by SPICE. Even something as simple as the power supply range is missing from spice models unless perhaps it is there as a comment. Obviously spice can be used to simulate and IC at best and worst case temperature and best and worse case voltage etc. But the user must choose the limits unless they are obtained automatically from a specification like IBIS. I don't see any reason why a SPICE package couldn't be modified to do this though. > 6) IBIS has been extended to include resistor and capacitor packages as > well as diode packages. This can be done in SPICE, but there are again no rules > about what information is present and how it is organized. This works OK > (though a bit of extra work in a schematic level simulator) however it does not work > very well if the model must be used at the board level and automatically > loaded. >Fred said: Not only can Spice to this but it can do this elequently, both at the > schematic level and board level. Kellee you should learn more about > using Spice subckts. It works wonderfully well at the board level thankyou, > we've been doing this since 1992. As I said schematic level can be done in SPICE. If you have made some SPICE sub-circuits for some resistor packs at the board level I would say great but I don't see any standard method for describing R,C,diode packs emerging other than IBIS. > 7) IBIS is also being extended to do connector models. The IBIS specification is not complete in this area. While SPICE can be used to model connectors there is no standards and that includes lack of specification of standard methods for coupling matrix's. Hopefully we will make some progress with IBIS in creating a connector specification this year. I hope you will participate in this effort as I know you and your company have a large amount of knowledge in this area. ------------------------------------------------------------------------- Have a great day... Kellee Crisafulli at HyperLynx kellee@hyperlynx.com http://www.hyperlynx.com ------------------------------------------------------------------------- From owner-ibis Tue Mar 31 05:12:34 1998 Received: from tower.ti.com (tower.ti.com [192.94.94.5]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id FAA14095 for ; Tue, 31 Mar 1998 05:12:33 -0800 (PST) Received: from totoro.tdc.tijp.ti.com ([134.183.198.39]) by tower.ti.com (8.8.8) with ESMTP id HAA20046 for ; Tue, 31 Mar 1998 07:09:06 -0600 (CST) Received: from mario.tdc.tijp.ti.com (mario.tdc.tijp.ti.com [134.183.199.26]) by totoro.tdc.tijp.ti.com (8.7.1/8.6.9) with ESMTP id WAA00520 for ; Tue, 31 Mar 1998 22:08:57 +0900 (JST) Received: (from tkgm@localhost) by mario.tdc.tijp.ti.com (8.7.1/3.3W6) id WAA12838; Tue, 31 Mar 1998 22:08:55 +0900 (JST) Date: Tue, 31 Mar 1998 22:08:55 +0900 (JST) Message-Id: <199803311308.WAA12838@mario.tdc.tijp.ti.com> From: Akihiro Takegama To: ibis-users@vhdl.org Subject: About WARNING of ibischk2 To: IBIS-users, Hello, I'm making the IBIS model. But I am confused at ibischk. Could you support me ? I have one question. 1 ) I made the IBIS model within "Rising Waveform" and "Falling Waveform" and I ran the ibischk2. But many warning appeares it's IBIS model, which like as below. Could you please tell me how to calculate the value [3]. ? - ---------------------------------------------------------------------------- WARNING - Model 'inout': MIN AC Rising Endpoints ( 0.74V, 3.00V) not within ------------- [1] 0.045V (2%) of ( 0.95V, 3.00V) on VI curves for 50 Ohms to 3V ----------- ---------------- [2] [3] - ----------------------------------------------------------------------------- - Regards, A.Takegama ************************************ * Name : Akihiro Takegama * * E-mail : tkgm@tdc.tijp.ti.com * * Corp. : Texas Instruments * ************************************ ------- End of forwarded message ------- From owner-ibis Tue Mar 31 10:05:49 1998 Received: from relay7.UU.NET (relay7.UU.NET [192.48.96.17]) by server.vhdl.org (8.8.5/8.8.3) with ESMTP id KAA19930 for ; Tue, 31 Mar 1998 10:05:47 -0800 (PST) Received: from uucp3.uu.net by relay7.UU.NET with SMTP (peer crosschecked as: uucp3.uu.net [192.48.96.83]) id QQejcq03077; Tue, 31 Mar 1998 13:02:44 -0500 (EST) Received: from qdt.UUCP by uucp3.uu.net with UUCP/RMAIL ; Tue, 31 Mar 1998 13:02:45 -0500 Received: from hal.UUCP by qdt.viewlogic.com (4.1/SMI-4.1) id AA18050; Tue, 31 Mar 98 10:08:07 PST Received: from f14 by qdt.com (4.1/SMI-4.1) id AA13793; Tue, 31 Mar 98 10:06:22 PST Sender: crokusek@qdt.com Message-Id: <35212F8A.31DFF4F5@qdt.com> Date: Tue, 31 Mar 1998 10:01:46 -0800 From: Chris Rokusek Organization: Quad Design Technology X-Mailer: Mozilla 3.01 (X11; I; SunOS 4.1.4 sun4m) Mime-Version: 1.0 To: Akihiro Takegama Cc: ibis-users@vhdl.org Subject: Re: About WARNING of ibischk2 References: <199803311308.WAA12838@mario.tdc.tijp.ti.com> Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Akihiro, The ibishk2 program is checking the first and last point of your Rising and Falling AC Waveforms against the DC VI curves and given test load (50 Ohms). For your case the message indicates that the first point given in the Rising Waveform table is .74V. If you were to plot the intersection of a 50 Ohm to 3V load line (slope = 50 V/I) and the given DC VI curve you would see that they interesect at .95V (this is fist value in [3] below). So since abs(.95 - .74) > 2% * (3 - .74) .21 > .045 The checker will print a warning. The reason for the check is that the first and last points of the AC waveforms are supposed to be the stable DC value when driving the given load. Chris Rokusek Viewlogic Akihiro Takegama wrote: > > To: IBIS-users, > > Hello, I'm making the IBIS model. But I am confused at ibischk. > Could you support me ? > > I have one question. > > 1 ) I made the IBIS model within "Rising Waveform" and "Falling > Waveform" and I ran the ibischk2. But many warning appeares > it's IBIS model, which like as below. > Could you please tell me how to calculate the value [3]. ? > > - ---------------------------------------------------------------------------- > WARNING - Model 'inout': MIN AC Rising Endpoints ( 0.74V, 3.00V) not within > ------------- > [1] > > 0.045V (2%) of ( 0.95V, 3.00V) on VI curves for 50 Ohms to 3V > ----------- ---------------- > [2] [3] > - ----------------------------------------------------------------------------- > > - Regards, > A.Takegama > > ************************************ > * Name : Akihiro Takegama * > * E-mail : tkgm@tdc.tijp.ti.com * > * Corp. : Texas Instruments * > ************************************ > ------- End of forwarded message -------