From owner-ibis  Wed May  3 17:20:15 2000
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From: gerald_truong <gtruong@eng.mcd.mot.com>
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Hello all,

    I was wondering if I could use the ibis2spice tool with hspice.

Gerald Truong
Motorola Computer Group
602-438-3525

From owner-ibis  Thu May  4 11:25:43 2000
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To: ibis-users@eda.org
cc: jhayes@btv.ibm.com
Subject: Merging modes 
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Date: Thu, 04 May 2000 14:23:24 -0400
From: Jerry Hayes <jhayes@btv.ibm.com>


I have an I/O where the output PFET is switching when used
as a driver, however it acts as a fixed termination impedance
when used as a receiver.  I created two modes of operation
where one mode models the I/O as an output and the 
characteristics of the PFET reside in the [Pullup] table and
another mode that models the I/O as a input where I combined
the characteristics of the PFET termination with the power 
clamp in the [Power_Clamp] table.  This worked ... however the
customer views this as unacceptable because they have to change 
model assignments between driver and receiver modes and is
requesting that I merge these modes into one mode using the
I/O model type.  Is this possible?

Thanks,
Jerry 

From owner-ibis  Thu May  4 12:11:57 2000
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From: "Muranyi, Arpad" <arpad.muranyi@intel.com>
To: "'Jerry Hayes'" <jhayes@btv.ibm.com>, ibis-users@eda.org
Subject: RE: Merging modes 
Date: Thu, 4 May 2000 12:10:07 -0700 
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Yes.  Use the dynamic clamp submodel without pulse
table which makes it static, and specify non-driver mode.
Then copy your I-V curve (pd or pu) into the submodel
as a clamp curve.  This will do what you need, and is
legal in terms of the spec.

Arpad
========================================================

-----Original Message-----
From: Jerry Hayes [mailto:jhayes@btv.ibm.com]
Sent: Thursday, May 04, 2000 11:23 AM
To: ibis-users@eda.org
Cc: jhayes@btv.ibm.com
Subject: Merging modes 



I have an I/O where the output PFET is switching when used
as a driver, however it acts as a fixed termination impedance
when used as a receiver.  I created two modes of operation
where one mode models the I/O as an output and the 
characteristics of the PFET reside in the [Pullup] table and
another mode that models the I/O as a input where I combined
the characteristics of the PFET termination with the power 
clamp in the [Power_Clamp] table.  This worked ... however the
customer views this as unacceptable because they have to change 
model assignments between driver and receiver modes and is
requesting that I merge these modes into one mode using the
I/O model type.  Is this possible?

Thanks,
Jerry 


From owner-ibis  Wed May 10 04:01:54 2000
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From: "Olli Timonen" <Olli.Timonen@tellabs.fi>
To: ibis-users@eda.org
Message-ID: <C22568DB.003BFE4A.00@notesmail.tellabs.fi>
Date: Wed, 10 May 2000 14:02:56 +0300
Subject: How to correct the monotonicity problem of ibis model when
	 importing model to ICX?
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Hello!

I tried to import an ibis model to ICX. It reports following errors of non
monononicity:

Error: The sum of the typical clamp curves is not monotonic at voltage 1.6
Error: The sum of the minimum clamp curves is not monotonic at voltage 2.1
Error: The sum of the maximum clamp curves is not monotonic at voltage 2.6

!! the model in question is in the end of this message !!

What is the best way to modify this model to make it compatible with ICX? Does
simulation distort significantly if I just change all the I-values to zeros
after voltage has turned positive?


Second question:

What is the good (best) way to define Vmeas value if it isn't included in the
model and can't be found from the datasheets, etc. (maybe Vdd*0.5?)?


********************************************************

[Model]            ptic
Model_type        Input
Polarity   Non-Inverting
Enable      Active-Low
Vinl =       0.8000V
Vinh =        2.000V
C_comp         5.0pF           5.0pF           5.0pF

[Temperature Range]    25.0000      85.000      -40.0000
[Voltage Range]         3.3000V     2.9700V      3.6300V
[GND_clamp]
| voltage     I(typ)           I(min)        I(max)

-3.30          -0.761         -0.682         -0.999
-3.20          -0.712         -0.641         -0.928
-3.10          -0.664         -0.601         -0.859
-3.00          -0.618         -0.563         -0.794
-2.90          -0.574         -0.526         -0.731
-2.80          -0.531          -0.49          -0.67
-2.70           -0.49         -0.455         -0.612
-2.60          -0.451         -0.421         -0.557
-2.50          -0.413         -0.388         -0.504
-2.40          -0.376         -0.357         -0.454
-2.30          -0.342         -0.327         -0.407
-2.20          -0.308         -0.298         -0.362
-2.10          -0.277          -0.27         -0.319
-2.00          -0.247         -0.244          -0.28
-1.90          -0.219         -0.219         -0.243
-1.80          -0.188         -0.191         -0.208
-1.70          -0.166         -0.171         -0.172
-1.60          -0.145         -0.151         -0.147
-1.50          -0.124         -0.131         -0.123
-1.40          -0.104         -0.112         -0.101
-1.30         -0.0847        -0.0933        -0.0784
-1.20         -0.0659        -0.0751        -0.0576
-1.10         -0.0483        -0.0579        -0.0387
-1.00          -0.032        -0.0416        -0.0221
-0.90          -0.018         -0.027        -0.0099
-0.80         -0.0079        -0.0147       -0.00469
-0.70        -0.00311       -0.00627       -0.00265
-0.60        -0.00144       -0.00228       -0.00121
-0.50       -0.000504      -0.000854      -0.000315
-0.40       -7.55e-05      -0.000237      -2.37e-05
-0.30       -2.96e-06      -2.93e-05      -3.18e-07
-0.20          -8e-08      -1.65e-06      -1.28e-08
-0.10          -6e-09      -7.53e-08      -1.75e-09
0.00          -4e-09      -7.75e-09       3.25e-09
0.10          -1e-09       -2.5e-09       9.25e-09
0.20          -2e-09        2.5e-10       1.43e-08
0.30        -2.5e-09       -2.5e-10       1.57e-08
0.40          -4e-09       -7.5e-10       1.98e-08
0.50        -2.5e-09         -1e-09        2.2e-08
0.60          -2e-09          5e-10        2.7e-08
0.70          -3e-09          1e-09       3.12e-08
0.80          -1e-09       -1.5e-09        3.5e-08
0.90          -3e-09         -5e-10       3.98e-08
1.00          -2e-09       -7.5e-10       4.22e-08
1.10          -2e-09       -3.5e-09        4.5e-08
1.20               0      -1.96e-07       4.93e-08
1.30          -5e-09      -5.23e-06        5.1e-08
1.40       -2.99e-07      -1.05e-05       5.15e-08
1.50       -1.64e-05      -1.35e-05      -3.01e-06
1.60       -2.03e-05       -1.4e-05      -1.49e-05
1.70       -2.12e-05      -1.39e-05      -2.99e-05
1.80       -2.15e-05      -1.32e-05      -3.21e-05
1.90        -2.1e-05      -2.32e-05      -3.26e-05
2.00       -2.02e-05      -3.13e-05      -3.24e-05
2.10          -2e-05      -0.000108      -3.18e-05
2.20          -2e-05      -0.000168      -3.05e-05
2.30          -2e-05      -0.000152      -5.53e-05
2.40          -2e-05      -5.97e-05      -7.74e-05
2.50          -2e-05      -1.16e-05      -0.000134
2.60          -2e-05      -1.37e-06      -0.000245
2.70          -2e-05      -1.32e-07      -0.000562
2.80       -1.84e-06       -1.1e-08       -0.00048
2.90       -1.17e-07       1.25e-09      -0.000223
3.00          -1e-08       1.25e-09      -6.41e-05
3.10        -5.5e-09        2.5e-09       -9.3e-06
3.20          -1e-09          5e-09      -5.43e-07
3.30          -2e-09       1.05e-08       8.95e-08

[POWER_clamp]
| voltage      I(typ)         I(min)         I(max)

-3.30           0.388          0.281          0.525
-3.20           0.365          0.264          0.494
-3.10           0.343          0.248          0.464
-3.00           0.321          0.232          0.434
-2.90             0.3          0.216          0.406
-2.80            0.28            0.2          0.378
-2.70            0.26          0.186          0.352
-2.60           0.241          0.169          0.326
-2.50           0.222          0.156          0.301
-2.40           0.204          0.144          0.277
-2.30           0.187          0.131          0.254
-2.20           0.168          0.119          0.233
-2.10           0.154          0.107          0.212
-2.00            0.14         0.0948          0.192
-1.90           0.127         0.0828          0.169
-1.80           0.113          0.071          0.153
-1.70           0.101         0.0595          0.138
-1.60          0.0876         0.0484          0.122
-1.50          0.0748         0.0377          0.107
-1.40          0.0625         0.0279         0.0935
-1.30          0.0507          0.019         0.0796
-1.20          0.0396         0.0116         0.0665
-1.10          0.0295        0.00559         0.0543
-1.00          0.0205        0.00106         0.0428
-0.90          0.0127       0.000111         0.0321
-0.80         0.00535       8.34e-06         0.0219
-0.70        0.000761       7.24e-07          0.013
-0.60        4.39e-05       1.12e-07        0.00507
-0.50        1.37e-06       2.93e-08       0.000549
-0.40         4.5e-08       1.05e-08       2.08e-05
-0.30               0          5e-09       4.82e-07
-0.20          -1e-09        2.5e-09       1.48e-07
-0.10        -2.5e-09       1.25e-09       1.34e-07
 0.00          -2e-09       1.25e-09       1.29e-07



From owner-ibis  Wed May 10 10:12:17 2000
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Date: Wed, 10 May 2000 10:09:56 -0700
From: Bob Ross <bob_ross@mentorg.com>
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To: Olli Timonen <Olli.Timonen@tellabs.fi>
CC: ibis-users@eda.org
Subject: Re: How to correct the monotonicity problem of ibis model whenimporting 
 model to ICX?
References: <C22568DB.003BFE4A.00@notesmail.tellabs.fi>
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Olli:

I will respond briefly to your questions.

For non-monotonic data problem, it appears that your
suggestion of just zeroing out the noisy data should
eliminate the Error reports.  This approach should not
effect accuracy.  There may be other options that could
be discussed directly with the vendor.

There probably is not a completely general answer for
selecting a Vmeas when none can be found.  It is needed
if any timing delay data is specified.  My first
approach would be to select a value that is somewhere
midway between the input threshold voltages for the
input techology that the I/O buffer is designed to
drive.

Best Regards,
Bob Ross
Mentor Graphics


Olli Timonen wrote:
> 
> Hello!
> 
> I tried to import an ibis model to ICX. It reports following errors of non
> monononicity:
> 
> Error: The sum of the typical clamp curves is not monotonic at voltage 1.6
> Error: The sum of the minimum clamp curves is not monotonic at voltage 2.1
> Error: The sum of the maximum clamp curves is not monotonic at voltage 2.6
> 
> !! the model in question is in the end of this message !!
> 
> What is the best way to modify this model to make it compatible with ICX? Does
> simulation distort significantly if I just change all the I-values to zeros
> after voltage has turned positive?
> 
> Second question:
> 
> What is the good (best) way to define Vmeas value if it isn't included in the
> model and can't be found from the datasheets, etc. (maybe Vdd*0.5?)?
> 
> ********************************************************
> 
> [Model]            ptic
> Model_type        Input
> Polarity   Non-Inverting
> Enable      Active-Low
> Vinl =       0.8000V
> Vinh =        2.000V
> C_comp         5.0pF           5.0pF           5.0pF
> 
> [Temperature Range]    25.0000      85.000      -40.0000
> [Voltage Range]         3.3000V     2.9700V      3.6300V
> [GND_clamp]
> | voltage     I(typ)           I(min)        I(max)
> 
> -3.30          -0.761         -0.682         -0.999
> -3.20          -0.712         -0.641         -0.928
> -3.10          -0.664         -0.601         -0.859
> -3.00          -0.618         -0.563         -0.794
> -2.90          -0.574         -0.526         -0.731
> -2.80          -0.531          -0.49          -0.67
> -2.70           -0.49         -0.455         -0.612
> -2.60          -0.451         -0.421         -0.557
> -2.50          -0.413         -0.388         -0.504
> -2.40          -0.376         -0.357         -0.454
> -2.30          -0.342         -0.327         -0.407
> -2.20          -0.308         -0.298         -0.362
> -2.10          -0.277          -0.27         -0.319
> -2.00          -0.247         -0.244          -0.28
> -1.90          -0.219         -0.219         -0.243
> -1.80          -0.188         -0.191         -0.208
> -1.70          -0.166         -0.171         -0.172
> -1.60          -0.145         -0.151         -0.147
> -1.50          -0.124         -0.131         -0.123
> -1.40          -0.104         -0.112         -0.101
> -1.30         -0.0847        -0.0933        -0.0784
> -1.20         -0.0659        -0.0751        -0.0576
> -1.10         -0.0483        -0.0579        -0.0387
> -1.00          -0.032        -0.0416        -0.0221
> -0.90          -0.018         -0.027        -0.0099
> -0.80         -0.0079        -0.0147       -0.00469
> -0.70        -0.00311       -0.00627       -0.00265
> -0.60        -0.00144       -0.00228       -0.00121
> -0.50       -0.000504      -0.000854      -0.000315
> -0.40       -7.55e-05      -0.000237      -2.37e-05
> -0.30       -2.96e-06      -2.93e-05      -3.18e-07
> -0.20          -8e-08      -1.65e-06      -1.28e-08
> -0.10          -6e-09      -7.53e-08      -1.75e-09
> 0.00          -4e-09      -7.75e-09       3.25e-09
> 0.10          -1e-09       -2.5e-09       9.25e-09
> 0.20          -2e-09        2.5e-10       1.43e-08
> 0.30        -2.5e-09       -2.5e-10       1.57e-08
> 0.40          -4e-09       -7.5e-10       1.98e-08
> 0.50        -2.5e-09         -1e-09        2.2e-08
> 0.60          -2e-09          5e-10        2.7e-08
> 0.70          -3e-09          1e-09       3.12e-08
> 0.80          -1e-09       -1.5e-09        3.5e-08
> 0.90          -3e-09         -5e-10       3.98e-08
> 1.00          -2e-09       -7.5e-10       4.22e-08
> 1.10          -2e-09       -3.5e-09        4.5e-08
> 1.20               0      -1.96e-07       4.93e-08
> 1.30          -5e-09      -5.23e-06        5.1e-08
> 1.40       -2.99e-07      -1.05e-05       5.15e-08
> 1.50       -1.64e-05      -1.35e-05      -3.01e-06
> 1.60       -2.03e-05       -1.4e-05      -1.49e-05
> 1.70       -2.12e-05      -1.39e-05      -2.99e-05
> 1.80       -2.15e-05      -1.32e-05      -3.21e-05
> 1.90        -2.1e-05      -2.32e-05      -3.26e-05
> 2.00       -2.02e-05      -3.13e-05      -3.24e-05
> 2.10          -2e-05      -0.000108      -3.18e-05
> 2.20          -2e-05      -0.000168      -3.05e-05
> 2.30          -2e-05      -0.000152      -5.53e-05
> 2.40          -2e-05      -5.97e-05      -7.74e-05
> 2.50          -2e-05      -1.16e-05      -0.000134
> 2.60          -2e-05      -1.37e-06      -0.000245
> 2.70          -2e-05      -1.32e-07      -0.000562
> 2.80       -1.84e-06       -1.1e-08       -0.00048
> 2.90       -1.17e-07       1.25e-09      -0.000223
> 3.00          -1e-08       1.25e-09      -6.41e-05
> 3.10        -5.5e-09        2.5e-09       -9.3e-06
> 3.20          -1e-09          5e-09      -5.43e-07
> 3.30          -2e-09       1.05e-08       8.95e-08
> 
> [POWER_clamp]
> | voltage      I(typ)         I(min)         I(max)
> 
> -3.30           0.388          0.281          0.525
> -3.20           0.365          0.264          0.494
> -3.10           0.343          0.248          0.464
> -3.00           0.321          0.232          0.434
> -2.90             0.3          0.216          0.406
> -2.80            0.28            0.2          0.378
> -2.70            0.26          0.186          0.352
> -2.60           0.241          0.169          0.326
> -2.50           0.222          0.156          0.301
> -2.40           0.204          0.144          0.277
> -2.30           0.187          0.131          0.254
> -2.20           0.168          0.119          0.233
> -2.10           0.154          0.107          0.212
> -2.00            0.14         0.0948          0.192
> -1.90           0.127         0.0828          0.169
> -1.80           0.113          0.071          0.153
> -1.70           0.101         0.0595          0.138
> -1.60          0.0876         0.0484          0.122
> -1.50          0.0748         0.0377          0.107
> -1.40          0.0625         0.0279         0.0935
> -1.30          0.0507          0.019         0.0796
> -1.20          0.0396         0.0116         0.0665
> -1.10          0.0295        0.00559         0.0543
> -1.00          0.0205        0.00106         0.0428
> -0.90          0.0127       0.000111         0.0321
> -0.80         0.00535       8.34e-06         0.0219
> -0.70        0.000761       7.24e-07          0.013
> -0.60        4.39e-05       1.12e-07        0.00507
> -0.50        1.37e-06       2.93e-08       0.000549
> -0.40         4.5e-08       1.05e-08       2.08e-05
> -0.30               0          5e-09       4.82e-07
> -0.20          -1e-09        2.5e-09       1.48e-07
> -0.10        -2.5e-09       1.25e-09       1.34e-07
>  0.00          -2e-09       1.25e-09       1.29e-07
From owner-ibis  Wed May 10 22:18:57 2000
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From: Al Davis <albertd@hyperlynx.com>
To: "Olli Timonen" <Olli.Timonen@tellabs.fi>, ibis-users@eda.org
Subject: Re: How to correct the monotonicity problem of ibis model when importing model to ICX?
Date: Wed, 10 May 2000 09:28:16 -0700
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On Wed, 10 May 2000, Olli Timonen wrote:
> What is the best way to modify this model to make it compatible with ICX? Does
> simulation distort significantly if I just change all the I-values to zeros
> after voltage has turned positive?

The non-monotonic stuff looks like measurement noise to me.
You won't lose anything by just making it zero.  The
simulator probably does this anyway.

Non-monotonic means there is a negative resistance region. 
This means the circuit is probably unstable, which means it
is will oscillate in some conditions.  The real circuit
probably doesn't do this.  You are probably improving the
accuracy of the model if you flatten out the questionable
areas.  Just remove or comment out the offending lines.

The real device inside that is being modeled by a clamp
curve is usually a diode.  Diodes don't do that.  A proper
clamp curve should be zero, or at least nearly zero, with
current in the correct direction, in its reverse biased
region.

From owner-ibis  Mon May 15 02:48:17 2000
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To: <ibis-users@eda.org>
Subject: Different reference voltages for 5v tolerant parts.
Message-ID: <0056890010925394000002L942*@MHS>
Date: Mon, 15 May 2000 11:46:18 +0200
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Hello,

I have the following problem:

The IBIS spec mentions that in case of 5v tolerant parts (with Vcc=3.3V) the V/I curves should cover the
overvoltage range; -5V to 10V rather then -3.3V to 6.6V. 
- [Pull-up Reference] statement in S2IBIS2 does not seem to have effect  
- Since Vcc has an offset of 0.3V and the overvoltage has an offset of 0.5V the result is three different
   voltage ranges for the Pull-Up curve and the POWER clamp curve (Vtable=Vcc-Vcurve).

Hand editing and some extrapolation can fix all this but I was wondering how others deal with this problem. 
BTW after editing the correct voltage range in the .spi files and running s2ibis2 again the resulting table
looks a mess; incomplete and lots of 0V values.

Kind Regards,

Rene Voshol
From owner-ibis  Mon May 15 04:46:52 2000
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From: "Baoshu XU" <xbs@sz.huawei.com.cn>
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Subject: May any HyperLynx user help me?
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From owner-ibis  Mon May 15 11:10:32 2000
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Date: Mon, 15 May 2000 11:07:49 -0700 (PDT)
From: Syed Huq <shuq@cisco.com>
Reply-To: Syed Huq <shuq@cisco.com>
Subject: Re: Different reference voltages for 5v tolerant parts.
To: ibis-users@eda.org, rene.voshol@philips.com
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Since the voltage sweep range is controlled by [voltage range], which is your
Vdd, I would do the hand edit and extrapolation like you described.

Make sure your [Iterate] is specified in your .s2i file so the .spi does not
get over-written. If you still see issues, try running Hspice and bypass 
s2ibis2 on this hand edited .spi file.

Syed
Cisco Systems, Inc

> 
> Hand editing and some extrapolation can fix all this but I was wondering how 
others deal with this problem. 
> BTW after editing the correct voltage range in the .spi files and running 
s2ibis2 again the resulting table
> looks a mess; incomplete and lots of 0V values.
> 
> Kind Regards,
> 
> Rene Voshol

From owner-ibis  Mon May 15 13:30:41 2000
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From owner-ibis  Mon May 15 15:47:11 2000
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Thank you
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Date: Thu, 18 May 2000 11:25:02 -0500
From: Stephen Nolan <s-nolan1@ti.com>
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Question 1, 

In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]" it states that
"C_comp values are ignored for [Series MOSFET] models." How do you account for
the Cio(off) and Cio(on) characteristics of the FET in the IBIS model?

Question 2,
In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]", and Section 9.5,
"Series MOSFET Table Extractions", it says that the voltage applied to the drain
of the MOSFET is Vds, a fixed voltage difference between the drain and the
source. Quoting from section 9.5:

   Vds is held constant by having a fixed voltage Vds 
   between the drain and source nodes.

However, the drawing shows a fixed voltage source between the drain and GROUND!

|               +----------------------------------------+
|               |                                        |
|               |                   Ids = Table Current  |
|               |                   --->                 |
|               +---<---|     |--->----------+           |
|                   d   |_____| - s          | +         |
|                        --+-- Vgs       +---+---+  +----+----+
|                          | g  +        | Sweep |  |   Vs +  |
|                                        |   Vs  |  |Fixed Vds|
|                                        +---+---+  +----+----+
|                                            | -         |
|                                           GND         GND
|
|                  Example of Series MOSFET Table Extraction


I could see how this would result in a Vds voltage if Vs + was swept, so that it
was always equal to the swept Vs+Vds, but it says "Fixed", not "Sweep".


Shouldn't this drawing be as follows for a true Vds supply?
|                           +---------+
|                         + |   Vs +  | -
|               +-----------+Fixed Vds|------+
|               |           +---------+      |
|               |                            |
|               |   Ids = Table Current      |
|               |         --->               |
|               +---<---|     |--->----------+
|                   d   |_____| - s          | +
|                        --+-- Vgs       +---+---+  
|                          | g  +        | Sweep | 
|                                        |   Vs  | 
|                                        +---+---+
|                                            | -  
|                                           GND   



-- 
Regards,
Stephen M. Nolan
From owner-ibis  Fri May 19 06:16:42 2000
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From: Mike LaBonte <mikelabonte@cadence.com>
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To: ibis-users@eda.org
Subject: Re: IBIS Series MOSFET Models - questions
References: <3924195E.76C457A8@ti.com>
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Stephen,

The figure in the IBIS specification is electrically equivalent to yours,
although your version is easier to understand, in my opinion. The spec
shows two swept sources with a DC offset between them. I prefer your notion
of one fixed source and one swept source, closer to the hardware that would
actually be used.

I would like to see the diagrams also showing the attachment of the gate to Vcc,
since it currently appears that the entire circuit just floats up and down with the
sweep voltage. Then again, maybe the swept source should be attached between
the source and gate, since we are attempting to sweep Vgs.

By the way, has anyone found one of these series switch models available for
public use?

Mike

Stephen Nolan wrote:
> 
> Question 1,
> 
> In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]" it states that
> "C_comp values are ignored for [Series MOSFET] models." How do you account for
> the Cio(off) and Cio(on) characteristics of the FET in the IBIS model?
> 
> Question 2,
> In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]", and Section 9.5,
> "Series MOSFET Table Extractions", it says that the voltage applied to the drain
> of the MOSFET is Vds, a fixed voltage difference between the drain and the
> source. Quoting from section 9.5:
> 
>    Vds is held constant by having a fixed voltage Vds
>    between the drain and source nodes.
> 
> However, the drawing shows a fixed voltage source between the drain and GROUND!
> 
> |               +----------------------------------------+
> |               |                                        |
> |               |                   Ids = Table Current  |
> |               |                   --->                 |
> |               +---<---|     |--->----------+           |
> |                   d   |_____| - s          | +         |
> |                        --+-- Vgs       +---+---+  +----+----+
> |                          | g  +        | Sweep |  |   Vs +  |
> |                                        |   Vs  |  |Fixed Vds|
> |                                        +---+---+  +----+----+
> |                                            | -         |
> |                                           GND         GND
> |
> |                  Example of Series MOSFET Table Extraction
> 
> I could see how this would result in a Vds voltage if Vs + was swept, so that it
> was always equal to the swept Vs+Vds, but it says "Fixed", not "Sweep".
> 
> Shouldn't this drawing be as follows for a true Vds supply?
> |                           +---------+
> |                         + |   Vs +  | -
> |               +-----------+Fixed Vds|------+
> |               |           +---------+      |
> |               |                            |
> |               |   Ids = Table Current      |
> |               |         --->               |
> |               +---<---|     |--->----------+
> |                   d   |_____| - s          | +
> |                        --+-- Vgs       +---+---+
> |                          | g  +        | Sweep |
> |                                        |   Vs  |
> |                                        +---+---+
> |                                            | -
> |                                           GND
> 
> --
> Regards,
> Stephen M. Nolan
From owner-ibis  Fri May 19 07:23:15 2000
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Message-ID: <39254E1D.C5E0AEC5@ti.com>
Date: Fri, 19 May 2000 09:22:21 -0500
From: Stephen Nolan <s-nolan1@ti.com>
Organization: Texas Instruments Incorporated
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To: Mike LaBonte <mikelabonte@cadence.com>
CC: ibis-users@eda.org
Subject: Re: IBIS Series MOSFET Models - questions
References: <3924195E.76C457A8@ti.com> <39253E46.E6C8259B@cadence.com>
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Hi Mike,

I discussed this drawing with it's creator (Bob Ross) on the phone yesterday. It
appears that it was the nomenclature in the drawing that I was misunderstanding.
Here is another suggested improvement that I provided:

|               +----------------------------------------+
|               |                                        |
|               |                   Ids = Table Current  |
|               |                   --->                 |
|               +---<---|     |--->----------+           |
|                   d   |_____| - s          | +         |
|                        --+-- Vgs       +---+---+  +----+----+
|                          | g  +        | Sweep |  |  Sweep  |
|                                        |   Vs  |  |  Vs+Vds |
|                                        +---+---+  +----+----+
|                                            | -         |
|                                           GND         GND
|
|                  Example of Series MOSFET Table Extraction

The way that the power-supply on the drain was originally labeled, I had
misunderstood it to be a FIXED supply (like a Vdd). With the labeling I propose
above, I think it is more clear that this is a SWEPT supply that is always Vds
above Vs. 

I agree with you that the gate supply should be illustrated also.

There is an example model (Created by Mentor Graphics) of a TI CBT3383 part
available at: http://www.eda.org/pub/ibis/samples/ver3.1/cbt.ibs

Now another question:

What table voltage do I use for Vgs, when the series switch is a parallel NMOS
and PMOS?

|                      gateP=GND
|                          |
|                          o
|                       =======  Vgs-p
|                       |     |
|               ----<---+     +--->----
|                   d   |_____|   s
|                        --+--   Vgs-n
|                          |
|                      gateN=Vcc

-- 
Regards,
Stephen M. Nolan


Mike LaBonte wrote:
> 
> Stephen,
> 
> The figure in the IBIS specification is electrically equivalent to yours,
> although your version is easier to understand, in my opinion. The spec
> shows two swept sources with a DC offset between them. I prefer your notion
> of one fixed source and one swept source, closer to the hardware that would
> actually be used.
> 
> I would like to see the diagrams also showing the attachment of the gate to Vcc,
> since it currently appears that the entire circuit just floats up and down with the
> sweep voltage. Then again, maybe the swept source should be attached between
> the source and gate, since we are attempting to sweep Vgs.
> 
> By the way, has anyone found one of these series switch models available for
> public use?
> 
> Mike
> 
> Stephen Nolan wrote:
> >
> > Question 1,
> >
> > In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]" it states that
> > "C_comp values are ignored for [Series MOSFET] models." How do you account for
> > the Cio(off) and Cio(on) characteristics of the FET in the IBIS model?
> >
> > Question 2,
> > In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]", and Section 9.5,
> > "Series MOSFET Table Extractions", it says that the voltage applied to the drain
> > of the MOSFET is Vds, a fixed voltage difference between the drain and the
> > source. Quoting from section 9.5:
> >
> >    Vds is held constant by having a fixed voltage Vds
> >    between the drain and source nodes.
> >
> > However, the drawing shows a fixed voltage source between the drain and GROUND!
> >
> > |               +----------------------------------------+
> > |               |                                        |
> > |               |                   Ids = Table Current  |
> > |               |                   --->                 |
> > |               +---<---|     |--->----------+           |
> > |                   d   |_____| - s          | +         |
> > |                        --+-- Vgs       +---+---+  +----+----+
> > |                          | g  +        | Sweep |  |   Vs +  |
> > |                                        |   Vs  |  |Fixed Vds|
> > |                                        +---+---+  +----+----+
> > |                                            | -         |
> > |                                           GND         GND
> > |
> > |                  Example of Series MOSFET Table Extraction
> >
> > I could see how this would result in a Vds voltage if Vs + was swept, so that it
> > was always equal to the swept Vs+Vds, but it says "Fixed", not "Sweep".
> >
> > Shouldn't this drawing be as follows for a true Vds supply?
> > |                           +---------+
> > |                         + |   Vs +  | -
> > |               +-----------+Fixed Vds|------+
> > |               |           +---------+      |
> > |               |                            |
> > |               |   Ids = Table Current      |
> > |               |         --->               |
> > |               +---<---|     |--->----------+
> > |                   d   |_____| - s          | +
> > |                        --+-- Vgs       +---+---+
> > |                          | g  +        | Sweep |
> > |                                        |   Vs  |
> > |                                        +---+---+
> > |                                            | -
> > |                                           GND
> >
> > --
> > Regards,
> > Stephen M. Nolan
From owner-ibis  Fri May 19 07:44:20 2000
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Date: Fri, 19 May 2000 10:41:23 -0400
From: Christian Klein <Christian.Klein@fairchildsemi.com>
Subject: Re: IBIS Series MOSFET Models - questions
To: Mike LaBonte <mikelabonte@cadence.com>
Cc: ibis-users@eda.org
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Mike,

A while ago I created some Bus switch models. They can be found at:
http://www.fairchildsemi.com/models/ibis/#fst

-Christian

Mike LaBonte wrote:

> Stephen,
>
> The figure in the IBIS specification is electrically equivalent to yours,
> although your version is easier to understand, in my opinion. The spec
> shows two swept sources with a DC offset between them. I prefer your notion
> of one fixed source and one swept source, closer to the hardware that would
> actually be used.
>
> I would like to see the diagrams also showing the attachment of the gate to Vcc,
> since it currently appears that the entire circuit just floats up and down with the
> sweep voltage. Then again, maybe the swept source should be attached between
> the source and gate, since we are attempting to sweep Vgs.
>
> By the way, has anyone found one of these series switch models available for
> public use?
>
> Mike
>
> Stephen Nolan wrote:
> >
> > Question 1,
> >
> > In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]" it states that
> > "C_comp values are ignored for [Series MOSFET] models." How do you account for
> > the Cio(off) and Cio(on) characteristics of the FET in the IBIS model?
> >
> > Question 2,
> > In IBIS Version 3.2, Section 6, "Keyword:  [Series MOSFET]", and Section 9.5,
> > "Series MOSFET Table Extractions", it says that the voltage applied to the drain
> > of the MOSFET is Vds, a fixed voltage difference between the drain and the
> > source. Quoting from section 9.5:
> >
> >    Vds is held constant by having a fixed voltage Vds
> >    between the drain and source nodes.
> >
> > However, the drawing shows a fixed voltage source between the drain and GROUND!
> >
> > |               +----------------------------------------+
> > |               |                                        |
> > |               |                   Ids = Table Current  |
> > |               |                   --->                 |
> > |               +---<---|     |--->----------+           |
> > |                   d   |_____| - s          | +         |
> > |                        --+-- Vgs       +---+---+  +----+----+
> > |                          | g  +        | Sweep |  |   Vs +  |
> > |                                        |   Vs  |  |Fixed Vds|
> > |                                        +---+---+  +----+----+
> > |                                            | -         |
> > |                                           GND         GND
> > |
> > |                  Example of Series MOSFET Table Extraction
> >
> > I could see how this would result in a Vds voltage if Vs + was swept, so that it
> > was always equal to the swept Vs+Vds, but it says "Fixed", not "Sweep".
> >
> > Shouldn't this drawing be as follows for a true Vds supply?
> > |                           +---------+
> > |                         + |   Vs +  | -
> > |               +-----------+Fixed Vds|------+
> > |               |           +---------+      |
> > |               |                            |
> > |               |   Ids = Table Current      |
> > |               |         --->               |
> > |               +---<---|     |--->----------+
> > |                   d   |_____| - s          | +
> > |                        --+-- Vgs       +---+---+
> > |                          | g  +        | Sweep |
> > |                                        |   Vs  |
> > |                                        +---+---+
> > |                                            | -
> > |                                           GND
> >
> > --
> > Regards,
> > Stephen M. Nolan

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From owner-ibis  Mon May 22 04:42:26 2000
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To: ibis-users@eda.org
Subject: IBIS connector model
Date: Mon, 22 May 2000 07:39:54 -0400
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I am trying to extract a topology using SpectraQuest, but cannot because 
of the following error. "Errors: Connector With Active pin". The model is 
attached to this message. Can anyone clarify the proper use of connector
models in circuit simulation or provide me with a connector model? 

Regards,

Bashu Kanal
EMC Corporation
Design Verification Group
 <<conn149.ibs>> 

------_=_NextPart_000_01BFC3E2.76D5D094
Content-Type: application/octet-stream;
	name="conn149.ibs"
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	filename="conn149.ibs"

|***********************************************************************=
* =0A=
| SECTION primitive 'JACK_5'                                            =
     =0A=
|***********************************************************************=
* =0A=
[IBIS Ver] 3.2 =0A=
[File Name] conn149.ibs =0A=
[File Rev] 1.0 =0A=
[Source] =0A=
[Date] Tue Nov  3 15:06:56 EST 1998=0A=
[Notes] 1. Temp Typ=3D25C, Min=3D100C, Max=3D0C 2. Ramp rates based =0A=
         on 500 ohm load =0A=
|[Copyright 1997, DRC Technology, Inc.] =0A=
[Disclaimer] =0A=
|***********************************************************************=
* =0A=
| =0A=
[Component] CONN149 =0A=
[Manufacturer] CONN =0A=
[Package] =0A=
| variable   typ   min   max =0A=
R_pkg            0.022m   NA   NA=0A=
L_pkg            11.13nH  NA   NA=0A=
C_pkg            0.022pF  NA   NA=0A=
| =0A=
[Pin] signal_name  model_name                     R_pin  L_pin C_pin =
=0A=
| =0A=
1      SIGNAL CONN149 =0A=
2      POWER  POWER =0A=
3      SIGNAL CONN149=0A=
4      GND    GND =0A=
5      GND    GND
6      SIGNAL CONN149=20
7      GND    GND
8      SIGNAL CONN149
9      GND    GND
10     SIGNAL CONN149
11     SIGNAL CONN149
12     SIGNAL CONN149
13     GND    GND
14     SIGNAL CONN149
15     SIGNAL CONN149
16     GND    GND
17     SIGNAL CONN149
18     SIGNAL CONN149
19     GND    GND
20     GND    GND
21     SIGNAL CONN149
22     SIGNAL CONN149
23     GND    GND
24     SIGNAL CONN149
25     SIGNAL CONN149
26     GND    GND
27     SIGNAL CONN149
28     SIGNAL CONN149
29     SIGNAL CONN149
30     GND    GND
31     SIGNAL CONN149
32     GND    GND=20
33     SIGNAL CONN149
34     GND    GND
35     GND    GND
36     SIGNAL CONN149
37     POWER  POWER
38     POWER  POWER
39     POWER  POWER
40     POWER  POWER
41     SIGNAL CONN149
42     SIGNAL CONN149
43     SIGNAL CONN149
44     SIGNAL CONN149
45     SIGNAL CONN149
46     SIGNAL CONN149
47     SIGNAL CONN149
48     SIGNAL CONN149
49     GND    GND
50     SIGNAL CONN149
51     GND    GND=20
52     SIGNAL CONN149
53     SIGNAL CONN149
54     GND    GND
55     SIGNAL CONN149
56     SIGNAL CONN149
57     GND    GND
58     GND    GND
59     SIGNAL CONN149
60     SIGNAL CONN149
61     GND    GND
62     SIGNAL CONN149
63     SIGNAL CONN149
64     GND    GND
65     SIGNAL CONN149
66     GND    GND
67     SIGNAL CONN149
68     SIGNAL CONN149
69     SIGNAL CONN149
70     SIGNAL CONN149
71     SIGNAL CONN149
72     SIGNAL CONN149
73     SIGNAL CONN149
74     SIGNAL CONN149
75     POWER  POWER
76     SIGNAL CONN149
77     POWER  CONN149
78     POWER  POWER
79     SIGNAL CONN149
80     GND    GND
81     GND    GND
82     SIGNAL CONN149
83     GND    GND
84     SIGNAL CONN149
85     GND    GND
86     SIGNAL CONN149
87     SIGNAL CONN149
88     GND    GND
89     SIGNAL CONN149
90     SIGNAL CONN149
91     GND    GND
92     SIGNAL CONN149
93     SIGNAL CONN149
94     GND    GND
95     SIGNAL CONN149
96     SIGNAL CONN149
97     GND    GND
98     SIGNAL CONN149
99     SIGNAL CONN149
100    GND    GND
101    SIGNAL CONN149
102    SIGNAL CONN149
103    GND    GND
104    SIGNAL CONN149
105    GND    GND
106    SIGNAL CONN149
107    GND    GND
108    GND    GND
109    SIGNAL CONN149
110    POWER  POWER
111    POWER  POWER
112    POWER  POWER
113    POWER  POWER
114    SIGNAL CONN149
115    SIGNAL CONN149
116    SIGNAL CONN149
117    SIGNAL CONN149
118    SIGNAL CONN149
119    SIGNAL CONN149
120    SIGNAL CONN149
121    SIGNAL CONN149
122    GND    GND
123    SIGNAL CONN149
124    GND    GND
125    SIGNAL CONN149
126    SIGNAL CONN149
127    GND    GND
128    SIGNAL CONN149
129    SIGNAL CONN149
130    SIGNAL CONN149
131    GND    GND
132    SIGNAL CONN149
133    SIGNAL CONN149
134    GND    GND
135    SIGNAL CONN149
136    SIGNAL CONN149
137    GND    GND
138    SIGNAL CONN149
139    GND    GND
140    SIGNAL CONN149
141    SIGNAL CONN149
142    SIGNAL CONN149
143    SIGNAL CONN149
144    SIGNAL CONN149
145    SIGNAL CONN149
146    SIGNAL CONN149
147    SIGNAL CONN149
148    POWER  POWER
149    POWER  POWER
|=0A=
[Model]   CONN149=0A=
Model_type  Terminator=0A=
|                       typ     min     max=0A=
C_comp                   3p     NA      NA=0A=
|=0A=
[Voltage range]         3.3V    NA      NA=0A=
|=0A=
[End] =0A=

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To: <Kanal_Bashu@emc.com>, <ibis-users@eda.org>
Subject: RE: IBIS connector model
Date: Mon, 22 May 2000 09:42:24 -0400
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I believe this error is due to the "pinuse" property of your connector pins in the Allegro symbol for the connector.  You need to
set the property to "unspec" on all connector pins.

-----Original Message-----
From: Kanal_Bashu@emc.com [mailto:Kanal_Bashu@emc.com]
Sent: Monday, May 22, 2000 7:40 AM
To: ibis-users@eda.org
Subject: IBIS connector model


I am trying to extract a topology using SpectraQuest, but cannot because
of the following error. "Errors: Connector With Active pin". The model is
attached to this message. Can anyone clarify the proper use of connector
models in circuit simulation or provide me with a connector model?

Regards,

Bashu Kanal
EMC Corporation
Design Verification Group
 <<conn149.ibs>>

From owner-ibis  Mon May 22 06:49:48 2000
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Date: Mon, 22 May 2000 06:47:59 -0700
To: Kanal_Bashu@emc.com, ibis-users@eda.org
From: Kellee Crisafulli <kellee@nwlink.com>
Subject: Re: IBIS connector model
In-Reply-To: <0DD20620B8B8D311985F00D0B708153B20AC2D@corpmx6.isus.emc.co
 m>
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Hi Kanal,

 At this point no company should be offering IBIS connector
models.  We have not released the standard yet and it
is still changing.

We do expect this work to be completed soon however.

best wishes..
Kellee Crisafulli

From owner-ibis  Mon May 22 07:51:47 2000
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To: ibis-users@eda.org
Subject: Please remove a model
Date: Mon, 22 May 2000 10:49:13 -0400
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To whom it may concern,

A misunderstanding has occurred. I sent a message and  attachment 
regarding an issue with model conn149.ibs. It was not my intention to 
have this model posted on the web. It is a modified connector model
with copyright information in the header as it appears to have been
written by a third party. I do not want anyone to mistakenly confuse
this model with or associate it with the author listed in the header,
therefore would you please remove it from the website.

Thank you,

Bashu Kanal     
From owner-ibis  Mon May 22 07:57:56 2000
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Date: Mon, 22 May 2000 10:55:55 -0400
To: Kanal_Bashu@emc.com, ibis-users@eda.org
From: Todd Westerhoff <toddw@cadence.com>
Subject: Re: IBIS connector model
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 m>
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Kanal,

I've seen several responses to your email, some of which were sent to you privately, but I'll overview the answer for the group:

The error message "Connector with Active Pin" points to a problem with the way device CLASS and PINUSE properties are set in your database.

A PCB database, by itself, is a physical database that can be used to manufacture a board.  If you want to accurately model the design for simulation, there is additional information that the simulation tools need:

1- an accurate description of the PCB cross-section (Stackup)
2- definitions of which nets are tied to which power supplies
3- an understanding of each device's electrical purpose (i.e. an IC?  a resistor pack? a connector?)
4- specific simulation models for critical high speed components
5- reasonable "default" simulation models for non-critical components without a specific model

Your issue is with point #3.  Allegro/SPECCTRAQuest use the properties of CLASS and PINUSE to define the device's type (CLASS = IC, DISCRETE or IO) and the function of the pins within the device (PINUSE).  The error message you refer to states that the system has found a connector (CLASS = IO) with a PINUSE other than UNSPEC.    The systems expects the PINUSE for a connector (CLASS = IO) to be UNSPECified because the device is assumed to be passive.

The usual issue is that a company's Allegro device library doesn't set the CLASS and PINUSE properties correctly, because the people who build the parts libraries aren't aware of the electrical requirements.  There are two ways to address the issue:

1. If the people who maintain your device libraries are willing to update their device files, great.
2. The "database setup advisor" introduced in the 13.6 release will guide you through the process of setting up the properties in your database, independent of addressing any fixes to the libraries.  This sets the properties directly in the individual .brd file.

For everyone else, my apologies for getting into so many tool-specific issues in a public forum.  The question was asked publicly, and I figured it would probably benefit a number of people to answer the question (at least to the first level) the same way.

Anyone who needs more detail, let's please take this on off the reflect - feel free to contact me @ toddw@cadence.com.

Todd.






At 07:39 AM 5/22/2000 -0400, Kanal_Bashu@emc.com wrote:
>I am trying to extract a topology using SpectraQuest, but cannot because 
>of the following error. "Errors: Connector With Active pin". The model is 
>attached to this message. Can anyone clarify the proper use of connector
>models in circuit simulation or provide me with a connector model? 
>
>Regards,
>
>Bashu Kanal
>EMC Corporation
>Design Verification Group
>  <<conn149.ibs>> 


    Todd Westerhoff
    Product Marketing Director | High Speed Systems Design | Performance Engineering
    Cadence Design Systems | 270 Billerica Road | Chelmsford, MA  01824
    
    ph: (978) 262-6327
    fx: (978) 446-6798
    email: toddw@cadence.com
    internal information website: http://www-ma.cadence.com/~toddw
From owner-ibis  Mon May 22 08:28:47 2000
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Subject: Re: IBIS connector model
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Kanal,

From within SPECCTRAQuest or Allegro, ensure that the "CLASS" of the
connector is set to "IO"; by default, it probably is set to "IC".  Also,
ensure that the "PINUSE" is set to "UNSPEC" for each of the pins on the
connector.  Then, from within the SPECCTRAQuest Model Assignment menu,
create or edit an/the IBIS Device, but ensure no IO buffers are assigned to
any pin (including, but not limited to CDSDefault*).

Regards,
Michael Cohen


From owner-ibis  Mon May 22 08:49:33 2000
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From: "Le, Dat (dle)" <dle@sequent.com>
To: "'rpryor@nortelnetworks.com'" <rpryor@nortelnetworks.com>,
        Kanal_Bashu@emc.com, ibis-users@eda.org
Subject: RE: IBIS connector model
Date: Mon, 22 May 2000 08:46:57 -0700
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Are you trying to extract the topology from a board2board file? Specctraquest
has a feature called "Design link". In this window, you can specify the pin
to pin interconnection, the length and a pointer to your  "dml" conn model. 
This's another area Specctraquest would spit out error message if your conn
model has a pin count or pin reference mismatch with Allegro boardfile.  Note
your conn.ibs file will need to translated to Specctraquest DML format. I use
ibis2signoise to do this. Yes, Specctraquest v13.5 or newer should be  able
to translate Ibis v 3.1 pkg format. 

As far as obtaining model, I had similar problem obtaining Ibis conn model.
Depend on your simulation accuracy requirement, it's pretty easy to create a
simple lumped single line PCI model in Specctraquest. You can obtain SLM and
MLM data from 
AMP or other conn vendors. More accurate pkg/conn model will need to be
translated directly from vendor Spice format to Cadence K-spice format.
Unfortunately, 6 months ago I  inquired Cadence regarding of an automate
script to do the spice translation without any success. Specctraquest does
have sample of generic pkg models shipped with this tool.

Dat Le
*****************************************
System Engineer
IBM-NumaQ
dle@sequent.com
(503)578-3412
*****************************************

> -----Original Message-----
> From:	Ross Pryor [SMTP:rpryor@nortelnetworks.com]
> Sent:	Monday, May 22, 2000 6:42 AM
> To:	Kanal_Bashu@emc.com; ibis-users@eda.org
> Subject:	RE: IBIS connector model
> 
> I believe this error is due to the "pinuse" property of your connector pins
> in the Allegro symbol for the connector.  You need to
> set the property to "unspec" on all connector pins.
> 
> -----Original Message-----
> From: Kanal_Bashu@emc.com [mailto:Kanal_Bashu@emc.com]
> Sent: Monday, May 22, 2000 7:40 AM
> To: ibis-users@eda.org
> Subject: IBIS connector model
> 
> 
> I am trying to extract a topology using SpectraQuest, but cannot because
> of the following error. "Errors: Connector With Active pin". The model is
> attached to this message. Can anyone clarify the proper use of connector
> models in circuit simulation or provide me with a connector model?
> 
> Regards,
> 
> Bashu Kanal
> EMC Corporation
> Design Verification Group
>  <<conn149.ibs>>
From owner-ibis  Mon May 22 09:38:13 2000
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Date: Mon, 22 May 2000 12:36:15 -0400
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Subject: Clarification - IBIS connector model
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...

"Anyone who needs more detail, let's please take this on off the reflect"

Wow.  Serves me for trying to type and hold a conversation at the same time.   What I MEANT to say, was:

"Anyone who needs more detail, let's please continue this off the reflector"

  - feel free to contact me @ toddw@cadence.com.

Todd.






At 07:39 AM 5/22/2000 -0400, Kanal_Bashu@emc.com wrote:
>I am trying to extract a topology using SpectraQuest, but cannot because 
>of the following error. "Errors: Connector With Active pin". The model is 
>attached to this message. Can anyone clarify the proper use of connector
>models in circuit simulation or provide me with a connector model? 
>
>Regards,
>
>Bashu Kanal
>EMC Corporation
>Design Verification Group
>  <<conn149.ibs>> 


    Todd Westerhoff
    Product Marketing Director | High Speed Systems Design | Performance Engineering
    Cadence Design Systems | 270 Billerica Road | Chelmsford, MA  01824
    
    ph: (978) 262-6327
    fx: (978) 446-6798
    email: toddw@cadence.com
    internal information website: http://www-ma.cadence.com/~toddw
From owner-ibis  Wed May 24 17:40:14 2000
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To: ibis-users@eda.org
Cc: yasufumi@lsi.nec.co.jp
Subject: [Q] off leak current?
Reply-To: akimoto@lsi.nec.co.jp
Date: Thu, 25 May 2000 09:38:27 +0900
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I have a question about the IBIS modeling.

Where should we put the off leak current into?
	1) Both CLAMP curves and PULLUP/DOWN curves?
	2) Only CLAMP curves?
	3) Only PULLUP/DOWN curves?
	4) Nothing? (Same as resistor?)

I'm afraid how the board simulators get this information
from IBIS model.
Please, don't ask me more about the off leak current. ^_^

Best regards,
Akimoto

------------------------------------------------------
Akimoto Tetsuya
Design systems dep. System LSI Design Engineering Div.
NEC Electron Devices, NEC Corporation
Email:akimoto@lsi.nec.co.jp  Phone:044-435-1513
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To: akimoto@lsi.nec.co.jp
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Subject: Re: [Q] off leak current?
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Hello Akimoto:

The answer is 2.  Clamp curves.

When the leakage current is significant, or
there are internal terminators, care must be
exercised in which clamp table the information
should be entered to avoid double counting.

1. If the leakage is to ground (or the lower rail),
then all of the leakage current should be put in
the [Gnd Clamp] and techically, the [Gnd Clamp]
range should be extended from -Vcc to 2 Vcc.

2. If the leakage is from Vcc than all of the
leakage current should be put into the [Power Clamp]
and its range also extended from -Vcc to 2 Vcc.

3. If the leakage is from both Vcc and Gnd paths,
then the appropriate leakage contributions should
be present in both the extended [Power Clamp]
and [Gnd Clamp] tables.  This applies to internal
terminators as well.

Bob Ross
Mentor Graphics



akimoto@lsi.nec.co.jp wrote:
> 
> I have a question about the IBIS modeling.
> 
> Where should we put the off leak current into?
>         1) Both CLAMP curves and PULLUP/DOWN curves?
>         2) Only CLAMP curves?
>         3) Only PULLUP/DOWN curves?
>         4) Nothing? (Same as resistor?)
> 
> I'm afraid how the board simulators get this information
> from IBIS model.
> Please, don't ask me more about the off leak current. ^_^
> 
> Best regards,
> Akimoto
> 
> ------------------------------------------------------
> Akimoto Tetsuya
> Design systems dep. System LSI Design Engineering Div.
> NEC Electron Devices, NEC Corporation
> Email:akimoto@lsi.nec.co.jp  Phone:044-435-1513
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 subscribe Fethi Bellamine

